25
IC03:BU1924
Block Diagram
560p
CMP
V
SS3
comparator
8th Switched
capacitor filter
anti-aliasing
filter
100kW
120kW
100kW
270p
MUX
Vref
2.2mF
V
DD1
*
1
Analog
Power supply
V
SS1
*
1
V
DD2
*
2
Digital
Power supply
V
SS2
XI
X0
4.332MH
Z
33pF
*
3
33pF
*
3
PLL
57kH
Z
RDS/ARI
PLL
1187.5Hz
Bi-phase
decoder
Measurement
circuit
Differential
decoder
T1
T2
RDATA
QUAL
RCLK
*
1 : V
DD1
and V
DD2
are separated within the IC.
*
2 : Have V
DD2
(digital power supply) of a sufficiently low impedance.
*
3 : Match the capacitor constants with the crystal manufacturer.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
RCLK
(N.C.)
XO
XI
V
DD2
V
SS2
TI
T2
QUAL
RDATA
Vref
MUX
V
DD1
V
SS1
V
SS3
CMP
Reference
clock
(4)
(3)
(5)
(6)
(12)
(11)
(13)
(14)
(10)
(7)
(8)
(16)
(2)
(9)
(1)
Pin Descriptions
Pin No.
Pin name
Symbol
Function
Input/output type
1
QUAL
Demodulator quality
Type C
Good data : High, bad data : Low
Refer to output data timing
6
V
SS1
7
CMP
Comparator input
Type D
C-junction (refer to input/output circuits )
8
V
SS3
GND
2
RDATA
Demodulator data
9
T2
Test input
Type B
Open or connected to ground
10
T1
3
Vref
Reference voltage
4
MUX
Input
Type E
Type D
1/2 V
DD1
(refer to input/output circuits)
Composite signal input (refer to input/output circuits)
11
V
DD2
Digital power supply
4.5V to 5.5V
12
V
SS2
13
XI
Crystal oscillator
Type A
Connects to 4.332MHz oscillator
(refer to input/output circuits)
14
XO
15
(N.C.)
-
-
-
Type C
16
RCLK
Demodulator clock
1187.5Hz clock (refer to the timing diagram)
5
V
DD1
Analog power supply 4.5V to 5.5V
-
-
-
-
-
Summary of Contents for Duetto SR110
Page 5: ...3 4 3 WIRING DIAGRAM...
Page 6: ...4 BLOCK DIAGRAM 5 6...
Page 7: ...7 8 5 SCHEMATIC DIAGRAM...
Page 8: ...9 10...
Page 9: ...11 12...
Page 16: ...24 IC02 LC72131 Block Diagram Pin Assignment...
Page 19: ...27 IC104 TDA7440 PIN CONNECTION BLOCK DIAGRAM...