
DSP1611/17/18/27/28/29 DIGITAL SIGNAL PROCESSOR
Information Manual
Bit I/O Unit
April 1998
10-4
DRAFT COPY
Lucent Technologies Inc.
(continued)
10.1.4 BIO Pin Multiplexing
The pins for the BIO are shared with functions of the PIO and the VEC[3:0] functions.
shows the corre-
sponding signal names. The bold font indicates the functions that are the default after RESET. The BIO functions
IOBIT[7:4] are selected if bit 12 (EBIOH) of the ioc register is set. The BIO functions IOBIT[3:0] are selected if bit
10 (ESIO2) of the ioc register is set.
Note: After reset, VEC[3:0] are the outputs and are driven low; and if IOBIT[7:4] are to be used as inputs, EBIOH
must be set before the inputs are driven high.
10.2 Software View
The cbit and sbit registers, the flags, and the pertinent instructions make up the software view.
is a
flow diagram showing the decisions made for each bit to determine the configuration of the BIO. Each decision is
determined by a bit in the designated fields of the sbit or cbit registers. In all cases, the data on the device pins is
stored in the VALUE field of sbit.
5-4204
Figure 10-4. Logic Flow Diagram for BIO Configuration
Table 10-1. BIO Pin Multiplexing
Symbol
Symbol
IOBIT0/PB4
IOBIT4/VEC3
IOBIT1/PB5
IOBIT5/VEC2
IOBIT2/PB6
IOBIT6/VEC1
IOBIT3/PB7
IOBIT7/VEC0
MODE?
DATA = ?
DATA = ?
PATTERN
MATCH ?
MASKED
?
IGNORE
INPUT
TOGGLE
OUTPUT
1 TO
OUTPUT
0 TO
OUTPUT
FLAG SETTING
LOGIC
INPUT, 0
OUTPUT, 1
TOGGLE,1
DATA,0
YES, 0
NO, 1
1
0
1
0
YES
NO
NO CHANGE
ON OUTPUT
INPUT
OR
OUTPUT?
ENABLE
OUTPUT
BUFFER
cbit HIGH BYTE
cbit LOW BYTE
cbit LOW BYTE
sbit HIGH BYTE
cbit LOW BYTE
cbit HIGH BYTE
Summary of Contents for DSP1611
Page 18: ...Chapter 1 Introduction...
Page 27: ...Chapter 2 Hardware Architecture...
Page 52: ...Chapter 3 Software Architecture...
Page 116: ...Chapter 4 Instruction Set...
Page 154: ...Chapter 5 Core Architecture...
Page 176: ...Chapter 6 External Memory Interface...
Page 208: ...Chapter 7 Serial I O...
Page 237: ...Chapter 8 Parallel I O DSP1617 Only...
Page 261: ...Chapter 9 Parallel Host Interface PHIF DSP1611 18 27 28 29 Only...
Page 275: ...Chapter 10 Bit I O Unit...
Page 284: ...Chapter 11 JTAG Test Access Port...
Page 306: ...Chapter 12 Timer...
Page 313: ...Chapter 13 Bit Manipulation Unit...
Page 325: ...Chapter 14 Error Correction Coprocessor DSP1618 28 Only...
Page 350: ...Chapter 15 Interface Guide...
Page 367: ...Appendix A Instruction Encoding...
Page 379: ...Appendix B Instruction Set Summary...
Page 381: ...aD extractz aS IM16 B 52 aD insert aS arM B 53 aD insert aS IM16 B 54 aD aS aaT B 55...
Page 437: ...Index...