Lucent Technologies DSP1611, Information Manual

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DSP1611/17/18/27/28/29 DIGITAL SIGNAL PROCESSOR Information Manual
Parallel I/O (DSP1617 Only) April 1998
8-22
DRAFT COPY
Lucent Technologies Inc.
8.4 PIO Signals
(continued)
8.4.1 PIO Pin Multiplexing
The PIO pins are multiplexed with BIO and SIO pins. The PIO functions are selected at the pins by clearing bit 10,
(ESIO2) in the ioc register.
Table 8-8 lists the pins and the corresponding functions. (For more details, see Section
15.1, Pin Information .)
8.5 PIO Loopback Test Mode
The DSP provides a number of features that can test the device's operation. The PIO can be self-tested by using a
loopback feature. This mode is selected in one of two ways: by setting the PIOLB bit in the jcon register (see
Sec-
tion 11.3.8, The JTAG Control Register—JCON , for information about the jcon register) or setting the PIOLBC bit in
the ioc register. The ioc register can be modified by the user under program control, but jcon can only be written
to through JTAG.
For PIO loopback to operate properly, the user must set PODS in active mode and PIDS in passive mode by setting
bit 12 and clearing bit 11 in the pioc. PIDS could be configured in active mode, but the data looping back would
suffer from the latency inherent in active mode reads (see
Section 8.2.2, Latent Reads ).
When the PIOLB bit is set—the PIO is configured for loopback, the PB pins are 3-stated, and an internal connec-
tion is made between pdx[OUT] and pdx[IN]. Both PODS and PIDS are 3-stated as well, and PODS now drives
PIDS internally. Therefore, whenever the DSP performs a PIO write, a PIO read is automatically performed. For
example, the following instructions
pdx0=0xA34A
*r1=pdx0
result in these actions: In the first instruction, the immediate hexadecimal value 0xA34A is moved into pdx[OUT]
where it is transferred to pdx[IN]. When the PIO is read in the next instruction, the same data is transferred to the
memory location pointed to by *r1.
If the interrupt on PIDS is enabled and the PIO read is performed in an interrupt service routine, the program
should have several nops between each PIO output to allow enough cycles for the interrupt to be taken. Later,
when the PIO is released from loopback (again by modifying either the jcon or ioc register), the data could be ver-
ified by writing to the parallel port again. As an alternative while the PIO is still configured for loopback, the data
could be written to the serial port or written to external RAM.
Table 8-8. PIO Pin Multiplexing
BQFP Pin TQFP Pin Symbol
65 52 IOBIT3/PB7
66 53 IOBIT2/PB6
67 54 IOBIT1/PB5
68 55 IOBIT0/PB4
70 57 SADD2/PB3
71 58 DOEN2/PB2
72 59 DI2/PB1
73 60 ICK2/PB0
74 61 OBE2/POBE
76 63 IBF2/PIBF
77 64 OLD2/PODS
78 65 ILD2/PIDS