LSI Symbios SYM53C040, Technical Manual

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normally, or (2) the TIP bit was written to a 0, which
manually interrupted the transfer.
TIP Transfer in Progress 0
When this bit is written to a 1, the DMA function will begin
a transfer. The transfer length is specified in the
DMA
Transfer Length (DTL) register ( 0xFC11 ) and the data
source or destination addresses are specified in the DMA
Source/Destination Low (DSDL) ( 0xFC12 ) and DMA
Source/Destination High (DSDH) ( 0xFC13 ) registers. The
read value of this bit will stay 1 until either (1) the transfer
completes normally, or (2) this bit is written to a 0, which
can only be done when the DMA is not active. While this
bit is 0, the other status bits in this register will be valid
and the DTL register will hold the remaining transfer
count. Conditions for which the SCSI core will interrupt
are discussed in
Chapter 2 .
Register: 0xFC11
DMA Transfer Length (DTL)
Read/Write
DTL[7:0] Data Transfer Length [7:0]
These register bits store the 8-bit transfer length for the
DMA function. This register should be set to a value
between 0x00 and 0xFF prior to setting bit 0 (TIP) of the
DMA Status (DS) register to initiate a transfer. Setting this
register to a value of 0 corresponds to a desired transfer
length of 256 bytes. When the transfer ends or is
interrupted, this register will read the value of the number
of bytes remaining in the transfer.
7 6 5 4 3 2 1 0
DTL7 DTL6 DTL5 DTL4 DTL3 DTL2 DTL1 DTL0
Defaults:
0 0 0 0 0 0 0 0