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4-14
SCSI and DMA Registers
Register: 0xFC10
DMA Status (DS)
Read/Write
The DMA function in the SYM53C040 provides the capability of
transferring up to 256 bytes from memory to the SCSI port or vice versa.
The DMA function is designed to handshake automatically with the SCSI
core, to offload the microcontroller and increase SCSI throughput. The
DS register provides basic control of the DMA function, the
register sets the 8-bit transfer length (1 to 256), and the
DMA Source/Destination Low (DSDL)
(
) and
Source/Destination High (DSDH)
(
) registers set the 16-bit
source or destination address for the data to be transferred. The DMA
function does not provide any additional capability for handling SCSI
protocol, so all phase changes and error conditions must still be handled
manually by the microcontroller. The DMA direction is based solely on
the SCSI I/O phase lines.
R
Reserved
[7:5]
IOD
I/O Direction
4
This status bit will indicate the current DMA direction.
This bit is written by the microcontroller. A high on this bit
indicates the DMA is reading bytes from the SCSI core
and writing them to memory. A low on this bit indicates
the DMA is reading bytes from memory and writing them
to the SCSI core.
TC
Transfer Complete
3
This read only status bit will read a 1 following the normal
completion of a DMA transfer.
R
Reserved
2
IEN
Interrupt Enable
1
When this bit is set to a 1, the DMA function will generate
an interrupt whenever the TIP bit transitions from a 1 to
a 0. This signifies that (1) the transfer completed
7
5
4
3
2
1
0
R
IOD
TC
R
IEN
TIP
Defaults:
0
0
0
x
x
0
x
x
Summary of Contents for Symbios SYM53C040
Page 12: ...xii Preface...
Page 90: ...4 18 SCSI and DMA Registers...
Page 98: ...5 8 SFF 8067 Registers...
Page 110: ...6 12 Two Wire Serial Registers...
Page 126: ...7 16 Miscellaneous Registers...
Page 160: ...8 34 System Registers...
Page 184: ...9 24 Electrical Characteristics...
Page 194: ...A 10 Register Summary...
Page 214: ......