SCSI Registers
4-65
Registers: 0x24–0x26
DMA Byte Counter (DBC)
Read/Write
DBC
DMA Byte Counter
[23:0]
This 24-bit register determines the number of bytes
transferred in a Block Move instruction. While sending
data to the SCSI bus, the counter decrements as data is
moved into the DMA FIFO from memory. While receiving
data from the SCSI bus, the counter decrements as data
is written to memory from the LSI53C896 SCSI function.
The DBC counter decrements each time data is
transferred on the PCI bus. It is decremented by an
amount equal to the number of bytes that are transferred.
The maximum number of bytes that can be transferred in
any one Block Move command is 16,777,215 bytes. The
maximum value that can be loaded into the
register is 0xFFFFFF. If the instruction is
a Block Move and a value of 0x000000 is loaded into the
DBC register, an illegal instruction interrupt occurs if the
LSI53C896 SCSI function is not in the target mode,
Command phase.
The
register is also used to
hold the least significant 24 bits of the first Dword of a
SCRIPTS fetch, and to hold the offset value during table
indirect I/O SCRIPTS. For a complete description see
Chapter 5, “SCSI SCRIPTS Instruction Set.”
The
power-up value of this register is indeterminate.
23
0
DBC
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
Summary of Contents for LSI53C896
Page 6: ...vi Preface...
Page 16: ...xvi Contents...
Page 88: ...2 62 Functional Description...
Page 112: ...3 24 Signal Descriptions...
Page 306: ...6 38 Specifications This page intentionally left blank...
Page 310: ...6 42 Specifications This page intentionally left blank...
Page 338: ...6 70 Specifications Figure 6 40 LSI53C896 329 BGA Bottom View...
Page 340: ...6 72 Specifications...
Page 346: ...A 6 Register Summary...
Page 362: ...IX 12 Index...