LSI LSI53C1030, Technical Manual

Page: 98 / 170

4-14 PCI Host Register Description
Version 2.1 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.
EEPROM interface is disabled and the ID Control pins
are internally pulled LOW, this register contains 0x1000.
If the serial EEPROM interface is disabled and the ID
Control pins are pulled HIGH, this register contains
0x8000. If a download from the serial EEPROM fails and
the ID Control pins are internally pulled LOW, this register
contains 0x0000. If a download from the serial EEPROM
fails and the ID Control pins are pulled HIGH, this register
contains 0x8000. Refer to
Section 3.10, “Power-On
Sense Pins Description,” , for additional information.
Register: 0x30–0x33
Expansion ROM Base Address
Read/Write
This four-byte register contains the base address and size information for
the expansion ROM.
Expansion ROM Base Address [31:11]
These bits correspond to the upper 21 bits of the expan-
sion ROM base address. The host system detects the
size of the external memory by first writing 0xFFFFFFFF
to this register and then reading the register back. The
LSI53C1030 responds with zeros in all don’t care loca-
tions. The least significant one (1) that remains repre-
sents the binary version of the external memory size. For
example, to indicate an external memory size of 32
Table 4.2 Subsystem ID Register Download Conditions and Values
MAD[7] State MAD[11] or MAD[10] LOW MAD[11] or MAD[10] HIGH
MAD[7] LOW
Subsystem ID = 0xXXXX
Bits [15:0] are downloaded.
1
(Default)
Subsystem ID = 0b1XXXXXXXXXXXXXXX
Bits [14:0] are downloaded with Bit [15] set.
2
MAD[7] HIGH
Subsystem ID register = 0x1000. Subsystem ID = 0x8000.
1. The Subsystem ID register returns 0x0000 if the serial EEPROM download fails.
2. The Subsystem ID register returns 0x8000 if the serial EEPROM download fails.
31 11 10 1 0
Expansion ROM Base Address
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0