6-4
Specifications
Figure 6.2
LVD Receiver
V
CM
+
−
+
+
+
−
−
−
V
I
2
V
I
2
Table 6.5
DIFFSENS SCSI Signals
Symbol
Parameter
Min
Max
Unit
Test Conditions
V
IH
HVD sense voltage
2.4
5.05
V
Note 1
V
S
LVD sense voltage
0.7
1.9
V
Note 1
V
IL
SE sense voltage
V
SS
−
0.35
0.5
V
Note 1
I
OZ
3-state leakage
−
10
10
µ
A
0 V
DD
= 3 Max
1. Functional test specified V
IH
/V
IL
for each mode.
Table 6.6
Input Capacitance
Symbol
Parameter
Min
Max
Unit
Test Conditions
C
I
Input capacitance of input pads
–
7
pF
Guaranteed by design
C
IO
Input capacitance of I/O pads
–
15
pF
Guaranteed by design
C
PCI
Input capacitance of PCI pads
–
8
pF
Guaranteed by design
C
LVD
Input capacitance of LVD pads
–
8
pF
6.5 pf Pad
1.5 pf Package
Summary of Contents for LSI53C1000
Page 6: ...vi Preface...
Page 16: ...xvi Contents...
Page 28: ...1 12 Introduction...
Page 234: ...4 124 Registers...
Page 314: ...6 40 Specifications This page intentionally left blank...
Page 318: ...6 44 Specifications This page intentionally left blank...
Page 344: ...6 70 Specifications This page intentionally left blank...
Page 350: ...6 76 Specifications Figure 6 42 LSI53C1000 329 Ball Grid Array Bottom view...
Page 352: ...6 78 Specifications...
Page 360: ...A 8 Register Summary...
Page 376: ...IX 12 Index...