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4-10
Registers
Registers: 0x14–0x17
Base Address Register One (BAR1) (MEMORY)
Read/Write
BAR1
Base Address Register One
[31:0]
This base address register, in conjunction with
Address Register Two (BAR2) (MEMORY)
, maps SCSI
operating registers into memory space and represents
the lower 32 bits of the memory address. Bits [9:0] are
hardwired to 0b0000000100. The default value of this
register is 0x00000004. The LSI53C1000 requires
1024 bytes of memory space. For detailed information on
the operation of this register, refer to the PCI 2.2
specification.
Registers: 0x18–0x1B
Base Address Register Two (BAR2) (MEMORY)
Read/Write
BAR2
Base Address Register Two
[31:0]
This base address register, in conjunction with
Address Register One (BAR1) (MEMORY)
, maps SCSI
operating registers into memory space and represents
the upper 32 bits of the memory address. The default
value of this register is 0x00000000. The LSI53C1000
requires 1024 bytes of memory space. For detailed
information on the operation of this register, refer to the
PCI 2.2 specification.
31
0
BAR1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
31
0
BAR2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Summary of Contents for LSI53C1000
Page 6: ...vi Preface...
Page 16: ...xvi Contents...
Page 28: ...1 12 Introduction...
Page 234: ...4 124 Registers...
Page 314: ...6 40 Specifications This page intentionally left blank...
Page 318: ...6 44 Specifications This page intentionally left blank...
Page 344: ...6 70 Specifications This page intentionally left blank...
Page 350: ...6 76 Specifications Figure 6 42 LSI53C1000 329 Ball Grid Array Bottom view...
Page 352: ...6 78 Specifications...
Page 360: ...A 8 Register Summary...
Page 376: ...IX 12 Index...