LSI LSI53C1000, Technical Manual

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General Purpose I/O (GPIO) Signals 3-13
3.5 General Purpose I/O (GPIO) Signals
Table 3.11 describes the GPIO Signals group.
Table 3.11 GPIO Signals
Name Bump Type Strength Description
GPIO0_
FETCH/ AB16 I/O 8 mA General Purpose I/O pin 0. This pin is programmable at
power-up, through the MAD7 pin, to serve as the data
signal for the serial EEPROM interface. When GPIO_0 is
not in the process of downloading EEPROM data it can
be used to drive a SCSI Activity LED, if bit 5 in the
General Purpose Pin Control (GPCNTL) register is set.
Or, it can be used to indicate that the next bus request
will be an opcode fetch if bit 6 in the
General Purpose Pin
Control (GPCNTL) register is set, it indicates if the next
bus request is an opcode fetch.
GPIO1_
MASTER/ Y16 I/O 8 mA General Purpose I/O pin 1. This pin is programmable at
power-up, through the MAD7 pin, to serve as the clock
signal for the serial EEPROM interface. If bit 7 of the
General Purpose Pin Control (GPCNTL) register is set,
this pin drives LOW when the LSI53C1000 is the bus
master.
GPIO2 AA16 I/O 8 mA General Purpose I/O pin 2. This pin powers up as an
input.
GPIO3 AC17 I/O 8 mA General Purpose I/O pin 3. This pin powers up as an
input.
GPIO4 AB17 I/O 8 mA General Purpose I/O pin 4. This pin powers up as an
output. It can be used as the enable line for V
PP
, the 12 V
power supply to the external flash memory interface.