* * * * * * * * * IMPORTANT * * * * * * * * * *
Only replace IC2 with an op-amp which is slower
than the SSM2143 such as the TL072 used here. A
faster op-amp like the NE5532 will cause the output of
IC4 to oscillate.
* * * * * * * * * * * * * * * * * * * * * * * * * * * *
Signal from IC1b is fed through anti-alias filter R14
C8 and DC isolated by C11 before connecting to the
left input of the sigma delta analog to digital converter
IC7. The right channel connects to the converter via
similar circuitry.
The 12.288 MHZ master clock input to the ADC is
generated by a crystal oscillator located on the DSP
control card. Combined left and right audio data is
sent synchronously (data, clock, frame sync) to the
DSP in 64-bit strings via connector P3. The reset sig-
nal from the DSP control card is also connected to the
ADC. The DSP activates the reset once a day which
causes the ADC to perform a self calibration routine
for about half a second. If the meter has undergone a
substantial temperature change, it may generate
noise up to -70 dBFS until it undergoes a calibration
cycle
The three supply voltages from P3 are EMI isolated
by ferrite beads FR1,FR2 and FR3 before connecting
to the other circuitry. IC5 and IC6 supply low noise
reg/- 5 VDC to the analog portions of the cir-
cuit. The digital part of the data converter gets its +5
VDC from the DSP control card.
Page 10
** Bright-VU Instruction Manual **
