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25
SDOI_DATA2
I/O
SDIO Data Line2 for WLAN
YES
26
SDOI_DATA1
I/O
SDIO Data Line1 for WLAN
YES
27
SDOI_DATA0
I/O
SDIO Data Line0 for WLAN
YES
28
AVDD11
O
Analog 1.1V output
(
Host no need to connect
)
NC
29
SDIO_CMD
I/O
SDIO Command for WLAN
YES
30
WLAN_EN#
I
Active low to reset WLAN
YES
31
BT_EN#
I
Active low to reset BT
YES
32
VDDIO_AO_IN
I
Can be 1.8V or 3.3V to support always on
circuit of QCA9379-3. This signal must be
connected to 1st power on and last power off
power rail. The design is target to connect to
3.3V
YES
33
BT_WAKEUP_HOST#
O
BT wake up Host. 10K PU in the module
, Low Active
YES
34
Debug_UART_TXD
O
Firmware Debug pin,
Host can be not
connected
NC
35
Debug_UART_RXD
I
Firmware Debug pin,
Host can be not
connected
NC
36
VDD33_SWREG_VIN
I
3.3V input to internal SWREG PMU and
OTPREG PMU
YES
37
SWREG_GND
G
Ground
YES
38
SWREG_GND
G
Ground
YES
39
VDDIO_GPIO2
I
1.8V or 3.3V upon signal interface
YES
40
32.768KHz_IN
I
Optional external low-power 32.768KHz
input Signal can not be active before
VDDIO_GPIO2 is applied
YES
41
AVDD11
I
Analog 1.1V input from Pin#28 of Module
(
Host no need to connect
)
NC
42
GND
G
Ground
YES
43
GND
G
Ground
YES
44
GND
G
Ground
YES
45
GND
G
Ground
YES
46
VDD33
I
3.3V Power for BT PA
YES
47
VDD33
I
3.3V Power for both 2.4GHz/5GHz PA in
WLAN Chain 0
YES
48
GND
G
Ground
YES
49
AVDD11
I
Analog 1.1V input from Pin#28 of Module
(
Host no need to connect
)
NC
50~66
GND
G
Ground
YES