8
dc2033af
DEMO MANUAL DC2033A
applications
The RJ9 jumper in the load current path must be ultra-0Ω,
1mΩ or less (the jumper's I
•
R drop adds an error term
to a wire drop compensation design). The RJ3 jumper is
ultra-0Ω, less than 1mΩ and can be removed and installed
as RJ9 (for an alternative to an ultra-0Ω jumper install two
0.25 inch length of 18AWG solid copper wires in parallel
for an RJ9 jumper).
Using the DC2033A with an LT6110 DFN Package
The bottom layer of a DC2033A is designed for an LT6110
DFN IC. To use a DC2033A for evaluating with an LT6110
DFN IC with an internal R
SENSE
requires the following:
Remove U1 (LT6110 SOT IC) and jumper RJ3 from the top
of the board. Install a U2 (LT6110 DFN), RJ11 and RJ12
on the bottom of DC2033A. Figure 8 shows the schematic
of a DC2033A with an LT6110 DFN package.
The DC2033A PCB layout is optimized for an LT6110
SOT23 package. A DC2033A with a LT6110 DFN (U2)
and an internal R
SENSE
, adds a 2% R
SENSE
error due to a
PCB via from the top to the bottom PCB layer. In addition
to using a DC2033A with a LT6110 DFN and an internal
R
SENSE
, the DC2033A can be configured for an LT6110
DFN with an external REXT or RPCB current sense resistor
(refer to the jumper table on the DC2033A schematic).
The load current path RJ6, RJ9, RJ11 and RJ12 jumpers
must be ultra-0Ω, less than 1mΩ, (for an alternative to
an ultra-0Ω jumper install two 0.25 inch length of 18AWG
solid copper wires in parallel for an RJ6, RJ9, RJ11 or
RJ12 jumper).
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