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QUICK START GUIDE FOR DEMONSTRATION CIRCUIT 1335A-B 

HIGH POWER, HIGH EFFICIENCY POE PD INTERFACE WITH INTEGRATED SWITCHING 

REGULATOR  

 

 

2

 

LTC4269IDKD-1 switches the port voltage over to the 
power supply controller through its internal MOSFET 
which lies between the V

PORTN

 and V

NEG

 pins. This volt-

age charges C18/19 through a trickle charge resistor, 
R9 to power the bias pin, V

CC

, of the power supply 

controller. Once the bias power gets to its V

CC(ON)

 

threshold, the IC begins a controlled soft-start of the 
output.  As the output voltage rises, bias power is 
taken over by the bias supply made up of T1’s bias 
winding and D11. 

 

When the soft-start period is over, the output voltage 
is  regulated  by  observing  the  pulses  across  the  bias 
winding  during  the  flyback  time.    The  Primary  Gate 

drive  (PG)  and  Synchronous  Gate  (SG)  drive  is  then 
Pulse  Width  Modulated  (PWM)  in  order  to  keep  the 
output voltage constant.  The synchronous gate drive 
signal  is  transmitted  to  the  secondary  via  the  small 
signal transformer, T2.  The output of T2 then drives 
a discrete gate drive buffer, R22 and Q6/7 in order to 
achieve fast gate transition times, hence a higher effi-
ciency. 

The two-stage input filter, C5, L2, and C6 and output 
filter, C1/3, L1, and C10 are the reasons that this PoE 
flyback supply has exceptionally low differential mode 
conducted emissions. 

QUICK START PROCEDURE 

Demonstration circuit 1335A-B is easy to set up to 
evaluate the performance of the LTC4269IDKD-1 in a 
PoE+ PD application. Refer to Figure 1 for proper 
equipment setup and follow the procedure below: 

 

NOTE:

 

When  measuring  the  input  or  output  voltage 

ripple, care must be taken to avoid a long ground lead 
on  the  oscilloscope  probe.  Measure  the  output  (or 
input)  voltage  ripple  by  touching  the  probe  tip  and 
probe ground directly across the +VOUT and –VOUT 
(or VPORT_P and VPORT_N) terminals. See Figure 2 
for proper scope probe technique. 

1. 

Place test equipment (voltmeter, ammeter, and 

electronic load) across output. 

 

2. 

Input supplies: 

a. 

Connect a PoE+ capable PSE with a CAT-5 cable 

to the RJ45 connector, J1.  See Figure 1. 

b.

 Or, connect a 37V to 57V capable power supply 

(‘‘Power Supply’’ in Figure 1) across VPORT_P and 
VPORT_N. 

c.

 If evaluating the auxiliary power supply (‘‘Auxil-

iary Supply’’ in Figure 1) capability, connect a 44V 
to 57V capable power supply across AUX+ to AUX-. 

 

3. 

Check for the proper output voltage of 5V. 

 

4. 

Once the proper output voltage is confirmed, adjust 

the load within the operating range and observe the 
output voltage regulation, ripple voltage, efficiency 
and other parameters. 

 

 

Summary of Contents for 1335A-B

Page 1: ...n files for this circuit board are available Call the LTC factory LTC and LT are registered trademarks of Linear Technology Corporation Table 1 Performance Summary TA 25 C PARAMETER CONDITION VALUE Port Voltage VPORT At Ethernet port 37V 57V Auxiliary Voltage VAUX From Aux to Aux terminals 44V 57V Output Voltage VOUT Initial Set point VPORT 37V to 57V IOUT 0A to 5A 5 0V 1 Maximum Output Current VP...

Page 2: ...input filter C5 L2 and C6 and output filter C1 3 L1 and C10 are the reasons that this PoE flyback supply has exceptionally low differential mode conducted emissions QUICK START PROCEDURE Demonstration circuit 1335A B is easy to set up to evaluate the performance of the LTC4269IDKD 1 in a PoE PD application Refer to Figure 1 for proper equipment setup and follow the procedure below NOTE When measur...

Page 3: ...ART GUIDE FOR DEMONSTRATION CIRCUIT 1335A B HIGH POWER HIGH EFFICIENCY POE PD INTERFACE WITH INTEGRATED SWITCHING REGULATOR 3 Figure1 Proper Measurement Equipment Setup Figure2 Measuring Input or Output Ripple ...

Page 4: ...are measured data for a typical DC1335A B 72 74 76 78 80 82 84 86 88 90 92 0 5 1 0 1 5 2 0 2 5 3 0 3 5 4 0 4 5 5 0 Output Current A E f fic ie n c y 42V 50V 57V Figure3 Efficiency not including Diode Bridge Figure4 Regulation 4 75 4 80 4 85 4 90 4 95 5 00 5 05 5 10 5 15 5 20 5 25 0 0 0 5 1 0 1 5 2 0 2 5 3 0 3 5 4 0 4 5 5 0 Output Current A E f f ic ie n c y 42V 50V 57V ...

Page 5: ... FOR DEMONSTRATION CIRCUIT 1335A B HIGH POWER HIGH EFFICIENCY POE PD INTERFACE WITH INTEGRATED SWITCHING REGULATOR 5 Figure5 Input and Output Ripple 48Vport 5A Figure6 Load Transient Response 48Vport 2 5A to 5A to 2 5A ...

Page 6: ...QUICK START GUIDE FOR DEMONSTRATION CIRCUIT 1335A B HIGH POWER HIGH EFFICIENCY POE PD INTERFACE WITH INTEGRATED SWITCHING REGULATOR 6 Figure7 Temp Data 37Vport 5A Top Figure8 Temp Data 37Vport 5A Bottom ...

Page 7: ...QUICK START GUIDE FOR DEMONSTRATION CIRCUIT 1335A B HIGH POWER HIGH EFFICIENCY POE PD INTERFACE WITH INTEGRATED SWITCHING REGULATOR 7 Figure9 Stresses 57Vport 5A Figure10 Stresses 37Vport 5A ...

Page 8: ...QUICK START GUIDE FOR DEMONSTRATION CIRCUIT 1335A B HIGH POWER HIGH EFFICIENCY POE PD INTERFACE WITH INTEGRATED SWITCHING REGULATOR 8 ...

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