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dc2541af

DEMO MANUAL DC2541A

operation

Power Control

The primary function of the LTC4279 is to control the de-

livery of power to the PSE port. It does this by controlling 

the gate drive voltage of an external power MOSFET (Q1) 

while monitoring the current via an external sense resistor 

(RS1) and the output voltage at the OUT pin. This circuitry 

serves to couple the raw VEE input supply to the port in 

a controlled manner that satisfies the PD’s power needs 

while minimizing both power dissipation in the MOSFET 

and disturbances on the VEE backplane.

Power Mode

The LTC4279 is a fully autonomous PSE controller and 

provides a complete PSE solution for detection, classifi-

cation and powering of PD devices in an IEEE 802.3 or 

LTPoE++ compliant system. The LTC4279 will power all 

valid PDs with I

CUT

 and I

LIM

 values based on the PWR-

MODE pin and the PD classification result. The LTC4279 

will remove power automatically if the port generates a 

current cutoff or limit fault. The LTC4279 senses removal 

of a PD and turns off power when the PD is disconnected. 

Internal control circuits comply with IEEE timing and 

electrical parameters.
The resistance value at the LTC4279 PWRMODE pin to 

VEE sets the LTC4279 maximum delivered power. On the 

DC2541A, the PWRMODE pin is connected with a 10k 

resistor (RM6) to VEE. The POWER MODE jumper (JP6) 

selects various resistances in parallel with RM6 to match 

the recommended R

PM

 value specified in the LTC4279 data 

sheet. The DC2541A can be set to 13W (IEEE 802.3af), 

25.5W (IEEE 802.3at), LTPoE++ 38.7W, 52.7W, 70W, or 

90W maximum power levels and defaults to the LTPoE++ 

90W power level if the shunt at JP6 is removed.
The PWRMODE pin configures the PSE’s maximum avail-

able power. Based on the PD Class result, the PD is allocated 

power if sufficient power is available. The DC2541A does 

not support the LTC4279 UltraPWR mode. Refer to the 

DC2579A for LTC4279 UltraPWR evaluation.

Power Supply Range 

The power supply voltage to the DC2541A must be set to 

meet the requirements of the PSE Type as listed in Table 1. 

The IEEE standard and LTPoE++ specification have defined 

voltage ranges for the PSE output. The power supply 

voltage to a legacy-configured PSE is dependent on the 

legacy PD and system requirements.

Data In/Data and Power Out

The DC2541A can be set up in a midspan PSE configuration 

for data and power evaluation. A PD is connected with a 

Cat5e cable to DATA AND POWER OUT RJ45 connector 

(J1). Power is injected on to the Ethernet lines through 

the center taps of the 1000BASE-T Ethernet transformer 

(T1). A 10BASE-T, 100BASE-T or 1000BASE-T PHY data 

source is connected with an Ethernet cable to DATA IN 

RJ45 connector J2 for optional data testing. Data is passed 

from J2 through to J1 with power.

LED Indicators

The VEE LED1 across the main power supply input indi-

cates the DC2541A is powered. The PORT PWR LED2 is 

connected from the AGND_P node to the LTC4279 LED 

open-drain output pin. The LED pin pulls low and turns on 

LED2 when the port is powered. Each LED has a current 

limiting resistor in series.

2-Pair vs. 4-Pair

The DC2541A jumpers PORT+ (JP1) and PORT– (JP2) 

select whether power is applied on only 2, or all 4, of the 

Ethernet cable pairs. The shunt settings at JP1 and JP2 must 

match. Table 1 lists the JP1 and JP2 settings as a function 

of PSE Type. If JP1 and JP2 are configured for 2-PAIR, 

power is applied with the voltage high side connected to 

Ethernet pair 1/2 and low side connected to Ethernet pair 

3/6. If JP1 and JP2 are configured for 4-PAIR, power is 

applied in parallel with the 2-PAIR configuration, and with 

the voltage high side connected to Ethernet pair 4/5 and 

the low side connected to Ethernet pair 7/8.

           

Summary of Contents for DC2541A

Page 1: ...setting the LTC4279 power mode LEGACY pin DUALPD pin and L LT LTC LTM Linear Technology LTPoE and the Linear logo are registered trademarks of Linear Technology Corporation All other trademarks are th...

Page 2: ...ts 5 Connect a PD with a Cat5e Ethernet cable to RJ45 connector J1 PORT PWR LED2 will turn on if the port power is on 6 Connect a 10BASE T 100BASE T or 1000BASE T PHY datasourcewithanEthernetcabletoJ2...

Page 3: ...lassresult thePDisallocated power if sufficient power is available The DC2541A does not support the LTC4279 UltraPWR mode Refer to the DC2579A for LTC4279 UltraPWR evaluation Power Supply Range The po...

Page 4: ...MODEmustbesetto52 7W or greater When the LTC4279 DUALPD pin is low dual signature PD support is disabled The LTC4279 DUALPD pin is internally pulled down to VEE if the shunt at JP4 is removed Warning...

Page 5: ...MOSFET The LTC4279 VEE pins and the sense resistor VEE pad connect to the VEE copper areas Figure 2 DC2541A Kelvin Sense Recommended Component Selection The DC2541A power path components RS1 Q1 and T...

Page 6: ...6 dc2541af DEMO MANUAL DC2541A PCB Layout Top Assembly Top Layer...

Page 7: ...7 dc2541af DEMO MANUAL DC2541A Inner Layer 2 Inner Layer 3...

Page 8: ...8 dc2541af DEMO MANUAL DC2541A Bottom Layer Bottom Assembly...

Page 9: ...BEST EFFORT TO DESIGN A CIRCUIT THAT MEETS CUSTOMER SUPPLIED SPECIFICATIONS HOWEVER IT REMAINS THE CUSTOMER S RESPONSIBILITY TO VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL APPLICATION COMPONENT...

Page 10: ...ORY INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE EXCEPT TO THE EXTENT OF THIS INDEMNITY NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT SPECIAL INCIDENTA...

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