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4

DEMO MANUAL DC252

DESIGN-READY SWITCHER

This demonstration board is easy to set up to evaluate
the performance of the LTC1736. Please follow the
procedure outlined below for proper operation. Sol-
dered wire connections are required to properly evalu-
ate the performance of this switching regulator.

• Refer to Figure 2 for proper connection of monitoring

and measurement equipment.

• Connect the input power supply to the V

IN

 and GND

terminals on the right-hand side of the board with
soldered connections. Do not increase V

IN

 over 28V

or the MOSFET(s) WILL BE DAMAGED.

• Connect the load between the V

OUT

 and GND termi-

nals on the right side of the board with soldered
connections.

• The RUN pin can be left unconnected. To shut down

the LTC1736, tie this pin to ground.

• Set jumper JP4 for the desired output voltage. (See

Table 1.)

• If an external 5V supply is used, connect it to EXTV

CC

.

• Set the jumper JP1 so that FCB selects the desired

mode:

JP1

MODE

On

Burst Mode Operation, Connect PGood to FCB/Sync

Off

Forced Continuous

Open

Apply External Clock to FCB/Sync

• Jumper JP2 determines if the overcurrent latchoff is

enabled. With JP2 installed this function is disabled.
Remove JP2 to enable.

JP2

OVERCURRENT LATCHOFF

Installed

Disabled

Removed

Enabled

• Active loads can cause confusing results. Refer to the

active load discussion in the Operation section.

QUICK START GUIDE

I  TRODUCTIO

U

U

The circuit in Figure 1 highlights the capabilities of the
LTC1736.

The LTC1736 is a synchronous step-down switching
regulator controller that drives external N-channel power
MOSFETs using a fixed frequency architecture with OPTI-
LOOP compensation. OPTI-LOOP compensation effectively
removes the constraints placed on C

OUT

 by other controllers

for proper operation (such as restrictions on very low
ESRs). Burst Mode operation provides high efficiency at

low load currents. Operating efficiencies typically exceed
80%  over more than two decades of load current range.

Do not use spring clip leads when testing this circuit.
Soldered wire connections are required to properly test
the performance of the PC board.

This demonstration circuit is intended for the evaluation of
the LTC1736 switching regulator IC and was not designed
for any other purpose.

LTC1736CG
DEMO CIRCUIT DC252A
(408) 432-1900

VID CPU POWER CONVERTER

JP2 LATCHOFF

JP3

PGOOD

V

O

PROG

JP4

B4

B0

JP1 BURST

EXT CLOCK

(REMOVE JP1 IF USED)

FCB/SYNC

EXTV

CC

PGOOD

OFF

ON

GND

GND

GND

V

OSNS

+V

OUT

+V

IN

I

IN

RUN

+

LOAD

V

OUT

I

OUT

+

+

OPTIONAL REMOTE

V

OUT 

SENSE CONNECTION

OPTIONAL EXTERNAL

HIGH FREQUENCY

SOURCE CONNECTION

A

A

252 F02

V

IN

Figure 2

Summary of Contents for DC252

Page 1: ...tel mobile VID standards of 0 9V to 2 0V An internal power goodcircuitmonitorstheoutputvoltageforout of regulationconditions Externalfrequencysynchronization isprovided asarethreemodesofoperation Burs...

Page 2: ...OOST SW VIN INTVCC BG PGND EXTVCC VIDVCC VID4 VID3 VID2 LTC1736CG24 PACKAGE A D SCHE ATIC DIAGRA W U W 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 COSC RUN SS ITH FCB SGND PGOOD SEN...

Page 3: ...AVX 843 946 0362 CS1 1 08055A102MAT1A 1000pF 50V 5 NPO Capacitor AVX 843 946 0362 D1 1 CMDSH 3 BVR 30V 0 1A Schottky Diode CENTRAL 516 435 1110 D2 1 MBRS340T3 BVR 40V 3A Schottky Diode ON SEMICONDUCTO...

Page 4: ...JP2 OVERCURRENT LATCHOFF Installed Disabled Removed Enabled Active loads can cause confusing results Refer to the active load discussion in the Operation section QUICK START GUIDE I TRODUCTIO U U The...

Page 5: ...egulation input to output voltage regulation as well as load regulation tests In doing line regulation tests always look at the input voltage across the input terminals Remote Output Voltage Sensing R...

Page 6: ...hereferencevoltage of 0 8V Jumper JP3 connects pull up resistor R1 from INTVCC to the power good output E1 This jumper is provided to allow other pull up voltages to be used Make OPERATIO U sure the m...

Page 7: ...nhibit mode allows heavily discontinuous low audio noise constant frequency operation down to ap proximately 1 of maximum designed load current This mode results in the elimination of switching freque...

Page 8: ...minallevel whetherornot the short circuit latchoff circuit is enabled With the overcurrent latchoff enabled a slow ramp on the input voltage may cause the circuit to latch off Simply re cycle the run...

Page 9: ...eration To alleviate the active load problem during testing the active load should be initially programmed to a much lower current value until the switching regulator s soft start interval has passed...

Page 10: ...PTI OPERATIO U LOOP compensation allows the transient response to be optimized over a wide range of output capacitances and ESR values The availability of the ITH pin not only allows optimization of c...

Page 11: ...range of the feedback loop The output voltage settling behavior is related to the stability of the closed loop system and will demonstrate the actual overall supply performance CapacitorCC2providesso...

Page 12: ...0 100 8 YES B 0 070 2 NO C 0 065 5 YES D 0 045 18 YES E 0 035 25 YES F 0 025 2 YES G 0 020 15 YES A A A A B B C C C D D D D D D E E G G G G G G G G G G G G G G G E E E E E E E E E E 10 PLCS E E E E E...

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