Linear Technology DC1791A Demo Manual Download Page 4

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DEMO MANUAL DC1791A

qUick stArt proceDUre

Demonstration circuit 1791A is easy to set up and evalu-

ate the performance of the LTM2887. Refer to Figure 2 

for proper measurement equipment setup and follow the 

procedure below. 

NOTE:

 When measuring the input or output voltage ripple 

or high speed signals, care must be taken to avoid a long 

ground lead on the oscilloscope probe.
1. Install JP1 in the ON (default) position.
2. With power off, connect the input power supply to V

CC

 

and GND on pin header J1. 

3. Turn on the power at the input. 

NOTE:

 Make sure that the input voltage does not exceed 6V. 

4. Check for the proper output voltages. V

CC2

 = 5V and 

V

L2

 = 5V on pin header J2.

5. Once the proper output voltages are established, con-

nect signals to J1 and J2 pin headers as appropriate. 

The header pin names and locations are detailed on the 

demo board silkscreen below the pin headers.

TECHNOLOGY

µ

TECHNOLOGY

V

IN

+

Figure 2. Demo Board Setup

Summary of Contents for DC1791A

Page 1: ...25 C SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VCC Input Supply Range LTM2887 3 3 0 3 3 3 6 V LTM2887 5 4 5 5 0 5 5 V VCC2 Regulated Output Voltage 4 75 5 5 25 V Adjustable Output Voltage Range 0...

Page 2: ...bridge capacitor is formed be tween an inner layer of floating copper which overlaps the logic side and isolated side ground planes This structure creates two series capacitors each with approximatel...

Page 3: ...ed in Table 2 allow selection of the appropriate resistor values In addition the current limit of each output voltage rail may also be programmed The current limit threshold is set by resistors R8 and...

Page 4: ...the oscilloscope probe 1 Install JP1 in the ON default position 2 With power off connect the input power supply to VCC and GND on pin header J1 3 Turn on the power at the input NOTE Makesurethatthein...

Page 5: ...5 dc1791afa DEMO MANUAL DC1791A PCB Layout Layer 1 Top Layer Layer 2 Ground Plane Layer 3 Signal Layer Layer 4 Bottom Layer...

Page 6: ...P CER 470pF 250Vac 10 1808 MURATA GA342QR7GF471KW01L 5 2 J1 J2 0 1 DOUBLE ROW HEADER 5 2 PIN SAMTEC TSW 105 22 G D 6 2 J1 J2 0 1 FERRITE PLATE 5 2 HOLE FAIR RITE 2644247101 7 1 JP1 Header 1 3 2mm WURT...

Page 7: ...6 7 TITLE SCHEMATIC SIZE IC NO REV DATE SHEET OF APPROVALS SCALE NONE CUSTOMER NOTICE Wednesday March 04 2015 2 SPI DIGITAL OR I2C uMODULE ISOLATOR LOW EMI KEITH B 1 1 LTM2887CY 3S 5S 3I 5I DEMO CIRC...

Page 8: ...CLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE EXCEPT TO THE EXTENT OF THIS INDEMNITY NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT SPECIAL INCIDENTAL OR C...

Page 9: ...50 DB MLX80104 TESTINTERFACE I2C CPEV NOPB ISO35TEVM 434 KIT33978EKEVB XR17D158CV 0A EVB XR17V358 SP339 E4 EB XR18910ILEVB XR22804IL56 0A EB ZSC31050KIT V3 1 ZSC31150KIT V1 2 SCRUBBER EVM SI838XISO KI...

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