Linear Technology DC1760A Demo Manual Download Page 8 | Manualshive

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dc1760af

DEMO MANUAL DC1760A

SCHEMATIC DIAGRAM

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Summary of Contents for DC1760A

Page 1: ...equencies Design files for this circuit board are available at http www linear com demo PARAMETER CONDITION VALUE Supply Voltage ADC Depending on Sampling Rate and the A D Converter Provided This Supply Must Provide Up to 150mA Optimized for 3 3V 3 0V 3 5V Min Max Supply Voltage Amplifier Depending on Supply Voltage Used This Supply Must Provide Up to 25mA Optimized for 3 0V 2 7V 5 0V Min Max Anal...

Page 2: ...mpers The DC1760A demonstration circuit board should have the following jumper settings as default positions as per Figure 1 V 3 3V 2 7V TO 5V SINGLE ENDED INPUT SIGNAL JUMPERS ARE SHOWN IN DEFAULT POSITIONS PARALLEL DATA OUTPUT TO DC890 SINGLE ENDED ENCODE CLOCK V MATCHED SOURCE IMPEDANCE PAR SER Selects parallel or serial programming mode Default Serial DutyCycleStabilizer DCS Inparallelprogramm...

Page 3: ...aximum SNR In the caseoftheDC1760Athebandpassfilterusedfortheclock should be used prior to the DC1075A clock divide board The filters should be located close to the inputs to avoid reflections from impedance discontinuities at the driven endofalongtransmissionline Mostfiltersdonotpresent 50Ω outside the passband In some cases 3dB to 10dB pads may be required to obtain low distortion Encode Clock N...

Page 4: ...ADCConfiguration Check the Config Manually box and use the following configura tion options see Figure 2 Figure 3 PScope Toolbar Manual configuration settings Bits 14 Alignment 14 FPGA Ld CMOS Channs 2 Bipolar Un checked Positive Edge Clk Checked If everything is hooked up properly powered and a suit able convert clock is present clicking the Collect button should result in time and frequency plot...

Page 5: ...LKOUT delay 45 CLKOUT delayed by 45 90 CLKOUT delayed by 90 135 CLKOUT delayed by 135 ClockDutyCycle EnablesordisablesDutyCycleStabilizer Stabilizer off Default Duty Cycle Stabilizer disabled Stabilizer on Duty Cycle Stabilizer enabled Output Current Selects the LVDS output drive current This option is not used on the FT1370 1 75mA Default LVDS output driver current 2 1mA LVDS output driver curren...

Page 6: ...101 and 010 1010 0101 1010 on alternat ing samples Alternating Digital outputs alternate between all 1 s and all 0 s on alternating samples Alternate Bit Alternate Bit Polarity ABP mode Off Default Disables alternate bit polarity On Enablesalternatebitpolarity BeforeenablingABP be sure the part is in offset binary mode Randomizer Enables Data Output Randomizer Off Default Disables data output rand...

Page 7: ... 1 R17 RES 0402 10Ω 1 1 16W VISHAY CRCW040210R0FKED 19 0 R18 R19 R20 RES 0402 OPT 20 1 R2 RES 0402 10k 1 1 16W VISHAY CRCW040210K0FKED 21 1 R24 RES 0402 100k 1 1 16W VISHAY CRCW0402100KFKED 22 3 R25 R26 R29 RES 0402 4 99k 1 1 16W VISHAY CRCW04024K99FKED 23 2 R3 R31 RES 0402 180k 1 1 16W 5 VISHAY CRCW0402180KFKED 24 2 R39 R40 RES 0201 10Ω 5 1 20W VISHAY CRCW020110R0JNED 25 5 R4 R14 R32 R33 R35 REA ...

Page 8: ...8 dc1760af DEMO MANUAL DC1760A SCHEMATIC DIAGRAM ...

Page 9: ...orporation is believed to be accurate and reliable However no responsibility is assumed for its use Linear Technology Corporation makes no representa tion that the interconnection of its circuits as described herein will not infringe on existing patent rights SCHEMATIC DIAGRAM ...

Page 10: ...UDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE EXCEPT TO THE EXTENT OF THIS INDEMNITY NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT SPECIAL INCIDENTAL OR CONSEQUENTIAL DAMAGES The user assumes all responsibility and liability for proper and safe handling of the goods Further the user releases LTC from all claims arising from the handling or use of the goo...

Page 11: ...Mouser Electronics Authorized Distributor Click to View Pricing Inventory Delivery Lifecycle Information Analog Devices Inc DC1760A ...

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