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dc1281af

DEMO MANUAL DC1281A

QUICK START PROCEDURE

Applying Power and Signals to the DC996 
Demonstration Circuit 

If a DC890 is used to acquire data from the DC1281A, the 
DC890 must 

first

 be connected to a powered USB port 

or provided an external 6V to 9V 

before

 applying 3.3V or 

3.6V across the pins 3.3V and PWR GND on the 
DC1281A. The LTC2209#3BC and LTC2209#3CD require 
3.6V for proper operation. The DC1281A demonstration 
circuit requires up to 700mA depending on the sampling 
rate and the A/D converter supplied.

The DC890 data collection board is powered by the USB 
cable and does not require an external power supply unless 
it must be connected to the PC through an unpowered hub 
in which case it must be supplied an external 6V to 9V on 
turrets G7(+) and G1(–) or the adjacent 2.1mm power jack.

Analog Input Network

For optimal distortion and noise performance the RC 
network on the analog inputs may need to be optimized 
for different analog input frequencies. For input frequen-
cies above 160MHz use demonstration circuit 1281A. 
Other input networks may be more appropriate for input 
frequencies less that 5MHz.

In almost all cases, filters will be required on both analog 
input and encode clock to provide data sheet SNR. 

The filters should be located close to the inputs to avoid 
reflections from impedance discontinuities at the driven 
end of a long transmission line. Most filters do not present 
50Ω outside the passband. In some cases, 3dB to 10dB 
pads may be required to obtain low distortion. 

If your generator cannot deliver full-scale signals without 
distortion, you may benefit from a medium power amplifier 
based on a Gallium Arsenide Gain block prior to the final 
filter. This is particularly true at higher frequencies where 
IC-based operational amplifiers may be unable to deliver 
the combination of low noise figure and High IP3 point 
required. A high order filter can be used prior to this final 
amplifier, and a relatively lower Q filter used between the 
amplifier and the demo circuit.

Encode Clock

Note: This is not a logic-compatible input. It is terminated 
with 50Ω.

 Apply an encode clock to the SMA connector 

on the DC1281A demonstration circuit board marked 
J7 ENCODE INPUT. This is a transformer-coupled input, 
terminated on the secondary side in two steps, 100Ω at 
the transformer with final termination at the ADC at 100Ω.

For the best noise performance, the ENCODE INPUT must 
be driven with a very low jitter source. When using a si-
nusoidal generator, the amplitude should often be as large 
as possible, up to 3V

P-P

 or 15dBm. Using bandpass filters 

on the clock and the analog input will improve the noise 
performance by reducing the wideband noise power of the 
signals. Data sheet FFT plots are taken with 10-pole LC 
filters made by TTE (Los Angeles, CA) to suppress signal 
generator harmonics, non-harmonically related spurs and 
broadband noise. Low phase noise Agilent 8644B genera-
tors are used with TTE bandpass filters for both the clock 
input and the analog input.

Apply the analog input signal of interest to the SMA connec-
tors on the DC1281A demonstration circuit board marked 
J5 ANALOG INPUT. These inputs are capacitive coupled to 
Balun transformers ETC1-1-13, or directly coupled through 
Flux-coupled transformers ETC1-1T.

An internally generated conversion clock output is available 
on J1 which could be collected via a logic analyzer, or other 
data collection system if populated with a SAMTEC MEC8-
150 type connector or collected by the DC890 QuikEval II 
Data Acquisition Board using PScope™ software.

Software

The DC890 is controlled by the PScope system software 
provided or downloaded from the Linear Technology 
website at 

http://www.linear.com/software/

. If a DC890 

was provided, follow the DC890 Quick Start Guide and 
the instructions below. 

To start the data collection software if PScope.exe is in-
stalled (by default) in \Program Files\LTC\PScope\, double 
click the PScope icon or bring up the run window under 
the start menu and browse to the PScope directory and 
select PScope. 

Summary of Contents for DC1281A

Page 1: ...com demo TA 25 C Table 1 DC1281A Variants DC1281A VARIANTS ADC PART NUMBER RESOLUTION MAXIMUM SAMPLE RATE INPUT FREQUENCY SUPPLY VOLTAGE 1281A A LTC2209 16 Bit 160Msps 1MHz to 80MHz 3 3V 1281A B LTC2209 16 Bit 160Msps 80MHz to 160MHz 3 3V 1281A E LTC2209 3BCPBF 16 Bit 180Msps 1MHz to 80MHz 3 6V 1281A F LTC2209 3BCPBF 16 Bit 180Msps 80MHz to 160MHz 3 6V 1281A G LTC2209 3CDPBF 16 Bit 185Msps 1MHz to...

Page 2: ...sition and Collection System was supplied with the DC1281A demonstration circuit follow the DC890 Quick Start Guide to install the required software and for connecting the DC890 to the DC1281A and to a PC DC1281A Demonstration Circuit Board Jumpers The DC1281A demonstration circuit board should have the following jumper settings as default as per Figure 1 J2 Mode VCC 2 s Complement DCS Off J3 SHDN...

Page 3: ...ed prior to this final amplifier and a relatively lower Q filter used between the amplifier and the demo circuit Encode Clock Note Thisisnotalogic compatibleinput Itisterminated with 50Ω Apply an encode clock to the SMA connector on the DC1281A demonstration circuit board marked J7 ENCODE INPUT This is a transformer coupled input terminated on the secondary side in two steps 100Ω at the transforme...

Page 4: ... in the DC890 Quick Start Guide and in the online help available within the PScope program itself Figure 2 ADC Configuration PARTS LIST ITEM QTY REFERENCE PART DESCRIPTION MANUFACTURER PART NUMBER 1 5 C1 C3 C6 C7 CAP X7R 0 01μF 16V 10 0603 AVX 0603YC103KAT 2 2 C13 C17 CAP X5R 2 2μF 10V 20 0805 AVX 0805ZD225MAT 3 3 C14 C24 C38 CAP X5R 4 7μF 10V 20 0805 AVX 0805ZD475MAT 4 15 C15 C16 C20 C22 C25 C32 ...

Page 5: ...5 BUFFER LVDS SINGLE FAIRCHILD FIN1101K8X 29 4 Z STAND OFF STAND OFF NYLON 0 25 tall KEYSTONE 8831 SNAP ON 30 5 SHUNT 0 079 CENTER SAMTEC 2SN BK G 31 2 STENCIL 20 20 STENCIL 1281A 20 20 32 1 FAB PCB DEMO CIRCUIT 1281A DC1281A A 1 1 DC1281A GENERAL BOM 2 1 C8 CAP NPO 4 7pF 50V 0 25pF 0402 AVX 04025A4R7CAT2A 3 2 C9 C10 CAP NPO 8 2pF 50V 0 25pF 0402 AVX 04025A8R2CAT2A 4 1 L1 IND 56nH 5 0603 MURATA LQ...

Page 6: ...D 7 1 T1 BALUN RF SMT 1 1 M A COM MABA 007159 000000 PbF 8 1 T2 TRANSFORMER WBC1 1L Coilcraft WBC1 1L 9 1 U2 ADC 16 BIT 180MSPS LINEAR LTC2209CUP 3BCPBF DC1281A G 1 1 DC1281A GENERAL BOM 2 1 C8 CAP NPO 4 7pF 50V 0 25pF 0402 AVX 04025A4R7CAT2A 3 2 C9 10 CAP NPO 8 2pF 50V 0 25pF 0402 AVX 04025A8R2CAT2A 4 1 L1 IND 56nH 5 0603 MURATA LQP18MN56NG02D 5 2 R36 R44 RES 86 6Ω 1 1 16W 0603 VISHAY CRCW060386R...

Page 7: ...orporation is believed to be accurate and reliable However no responsibility is assumed for its use Linear Technology Corporation makes no representa tion that the interconnection of its circuits as described herein will not infringe on existing patent rights SCHEMATIC DIAGRAM ...

Page 8: ...UDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE EXCEPT TO THE EXTENT OF THIS INDEMNITY NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT SPECIAL INCIDENTAL OR CONSEQUENTIAL DAMAGES The user assumes all responsibility and liability for proper and safe handling of the goods Further the user releases LTC from all claims arising from the handling or use of the goo...

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