LTM4622A
16
Rev B
For more information
APPLICATIONS INFORMATION
As a practical matter, it should be clear to the reader that
no individual or sub-group of the four thermal resistance
parameters defined by JESD51-12 or provided in the Pin
Configuration section replicates or conveys normal op-
erating conditions of a μModule. For example, in normal
board-mounted applications, never does 100% of the
device’s total power loss (heat) thermally conduct exclu-
sively through the top or exclusively through bottom of the
µModule—as the standard defines for
θ
JCtop
and
θ
JCbottom
,
respectively. In practice, power loss is thermally dissipated
in both directions away from the package—granted, in the
absence of a heat sink and airflow, a majority of the heat
flow is into the board.
Within a SIP (system-in-package) module, be aware there
are multiple power devices and components dissipating
power, with a consequence that the thermal resistances
relative to different junctions of components or die are not
exactly linear with respect to total package power loss. To
reconcile this complication without sacrificing modeling
simplicity—but also, not ignoring practical realities—an
approach has been taken using FEA software modeling
along with laboratory testing in a controlled-environment
chamber to reasonably define and correlate the thermal
resistance values supplied in this data sheet: (1) Initially,
FEA software is used to accurately build the mechanical
geometry of the µModule and the specified PCB with all of
the correct material coefficients along with accurate power
loss source definitions; (2) this model simulates a software-
defined JEDEC environment consistent with JESD51-12
to predict power loss heat flow and temperature readings
at different interfaces that enable the calculation of the
JEDEC-defined thermal resistance values; (3) the model
and FEA software is used to evaluate the µModule with
heat sink and airflow; (4) having solved for and analyzed
these thermal resistance values and simulated various
operating conditions in the software model, a thorough
laboratory evaluation replicates the simulated conditions
with thermocouples within a controlled-environment
chamber while operating the device at the same power
loss as that which was simulated. An outcome of this
process and due-diligence yields a set of derating curves
provided in other sections of this data sheet. After these
laboratory test have been performed and correlated to the
µModule model, then the
θ
JB
and
θ
BA
are summed together
to correlate quite well with the µModule model with no
airflow or heat sinking in a properly define chamber. This
θ
JB
+
θ
BA
value is shown in the Pin Configuration section
and should accurately equal the
θ
JA
value because ap-
proximately 100% of power loss flows from the junction
through the board into ambient with no airflow or top
mounted heat sink.
The 1.5V, 3.3V, 5V, 8V and 12V power loss curves in
Figure 8 to Figure 12 can be used in coordination with the
load current derating curves in Figure 13 to Figure 23 for
calculating an approximate
θ
JA
thermal resistance for the
LTM4622A (in two-phase single output operation) with no
heat sinking and various airflow conditions. The power loss
curves are taken at room temperature, and are increased
with multiplicative factors of 1.35 assuming junction
temperature at 120°C. The derating curves are plotted
with the output current starting at 4A and the ambient
temperature at 30°C. These output voltages are chosen
to include the lower and higher output voltage ranges
for correlating the thermal resistance. Thermal models
are derived from several temperature measurements in a
controlled temperature chamber along with thermal mod-
eling analysis. The junction temperatures are monitored
while ambient temperature is increased with and without
airflow. The power loss increase with ambient temperature
change is factored into the derating curves. The junctions
are maintained at 120°C maximum while lowering output
current or power with increasing ambient temperature. The
decreased output current will decrease the internal module
loss as ambient temperature is increased. The monitored
junction temperature of 120°C minus the ambient operat-
ing temperature specifies how much module temperature
rise can be allowed. As an example in Figure 16, the load
current is derated to ~3A at ~100°C with 200LFM air but
not heat sink and the power loss for the 5V to 3.3V at 3A
output is about 1.15W. The 1.15W loss is calculated with
the ~0.85W room temperature loss from the 5V to 3.3V
power loss curve at 3A, and the 1.35 multiplying factor.
If the 100°C ambient temperature is subtracted from the
120°C junction temperature, then the difference of 20°C
divided by 1.15W equals a 17.5°C/W
θ
JA
thermal resis-
tance. Table 3 specifies a 17°C/W – 18°C/W value which
is very close. Tables 2 to 6 provide equivalent thermal
resistances for 1.5V, 3.3V, 5V, 8V and 12V outputs with
