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LT8708-1

24

Rev 0

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APPLICATIONS INFORMATION

OPERATING FREQUENCY SELECTION
The LT8708-1 uses a constant frequency architecture 

operating between 100kHz and 400kHz. The LT8708-1 

should be synchronized to the same frequency as the 

LT8708 by connecting a clock signal to the SYNC pin. 

An appropriate resistor must be placed from the RT pin 

to ground. In general, use the same value R

T

 resistor for 

all the synchronized LT8708 and LT8708-1(s). See the 

Operating Frequency Selection section of the LT8708 data 

sheet on how to select the LT8708’s switching frequency. 

C

IN

 AND C

OUT 

SELECTION

V

IN

 and V

OUT

 capacitance is necessary to suppress volt-

age ripple caused by discontinuous current moving in and 

out of the regulator. A parallel combination of capacitors 

is typically used to achieve high capacitance and low ESR 

(equivalent series resistance). Dry tantalum, special poly-

mer, aluminum electrolytic and ceramic capacitors are all 

available in surface mount packages. Capacitors with low 

ESR and high ripple current ratings, such as OS-CON and 

POSCAP are also available.
Ceramic capacitors should be placed near the regulator 

input and output to suppress high frequency switching 

spikes. A ceramic capacitor, of at least 1µF at the maxi-

mum V

INCHIP

 operating voltage, should also be placed 

from V

INCHIP

 to GND as close to the LT8708-1 pins as 

possible. Due to their excellent low ESR characteristics, 

ceramic capacitors can significantly reduce input ripple 

voltage and help reduce power loss in the higher ESR 

bulk capacitors. X5R or X7R dielectrics are preferred, as 

these materials retain their capacitance over wide volt-

age and temperature ranges. Many ceramic capacitors, 

particularly 0805 or 0603 case sizes, have greatly reduced 

capacitance at the desired operating voltage.

C

IN

 and C

OUT

 Selection: V

IN

 Capacitance

Discontinuous V

IN

 current is highest in the buck region 

due to the M1 switch toggling on and off. Ensure that the 

C

IN

 capacitor network has low enough ESR and is sized 

to handle the maximum RMS current. Figure 7 shows 

the total input capacitor RMS ripple current for one to 

six phases with the V

OUT

 to V

IN

 ratios in buck operation. 

Figure 7. Normalized Total Input RMS Ripple Current vs V

OUT

/V

IN

 

for One to Six Phases in Buck Operation

V

OUT

/V

IN

0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9

0.60

0.55

0.50

0.45

0.40

0.35

0.30

0.25

0.20

0.15

0.10

0.05

0

87081 F06

I

(IN,RMS)

/I

OUT

6-PHASE

4-PHASE

3-PHASE

2-PHASE

1-PHASE

The total input RMS ripple current I

(IN,RMS)

 is normal-

ized against the total output current of the multiphase 

system (I

OUT

). The graph can be used in place of tedious 

calculations. From the graph, the minimum total input 

RMS ripple current can be achieved when the product of 

the number of phases (N) and the output voltage V

OUT

 

is approximately equal to integer multiples of the input 

voltage V

IN

 or:

 V

OUT

/V

IN

 = n/N

where n = 1, 2,…, N-1
Therefore, the number of phases can be chosen to mini-

mize the input capacitance for given input and output 

voltages.
Figure 7 also shows the maximum total normalized input 

RMS current for one to six phases. Choose an adequate 

C

IN

 capacitor network to handle this RMS current. 

C

IN

 is also necessary to reduce the V

IN

 voltage ripple 

caused by discontinuities and ripple of I

IN

. The effects of 

ESR and the bulk capacitance must be considered when 

choosing the correct capacitor for a given V

IN

 ripple. A 

low ESR input capacitor sized for the maximum RMS cur-

rent must be used. Add enough ceramic capacitance to 

Summary of Contents for Analog Devices LT8708-1

Page 1: ...system The LT8708 1 has the same conduction modes as LT8708 allowing the LT8708 1 to conduct current and power in the same direction s as the master The master controls the overall current and voltag...

Page 2: ...ER 20 Transfer Function CCM 21 Transfer Function DCM HCM and Burst Mode Operation 21 Current Monitoring and Limiting 21 Monitoring IOUT SLAVE 21 Monitoring and Limiting IIN SLAVE 21 Multiphase Clockin...

Page 3: ...to 150 C Note 1 15 16 17 18 TOP VIEW 41 GND UHG PACKAGE 40 LEAD 5mm 8mm PLASTIC QFN TJMAX 150 C JA 36 C W JC 38 C W EXPOSED PAD PIN 41 IS GND MUST BE SOLDERED TO PCB 19 20 21 40 39 38 37 36 35 34 26...

Page 4: ...mV INTVCC Regulator Dropout Voltage VINCHIP VINTVCC IINTVCC 20mA 245 mV LDO33 Pin Voltage 5mA from LDO33 Pin l 3 23 3 295 3 35 V LDO33 Pin Load Regulation ILDO33 0 1mA to 5mA 0 25 1 LDO33 Pin Current...

Page 5: ...0 560 mV ICN Rising Threshold for Enabling Non CCM Offset Current l 680 704 730 mV ICN Falling Threshold for Disabling Non CCM Offset Current l 500 530 560 mV Voltage Regulation Loops Refer to Block D...

Page 6: ...5 20 70 70 25 25 73 75 5 27 5 30 A A A A IMON_INN Output Current VCSNIN VCSPIN 50mV VCSNIN 5V VCSNIN VCSPIN 50mV VCSNIN 5V VCSNIN VCSPIN 5mV VCSNIN 5V VCSNIN VCSPIN 5mV VCSNIN 5V l l 66 65 19 18 70 7...

Page 7: ...ch apply over the specified operating junction temperature range otherwise specifications are at TA 25 C VINCHIP 12V SHDN 3V DIR 3 3V unless otherwise noted Note 3 Note 1 Stresses beyond those listed...

Page 8: ...IOUT A 0 01 0 1 1 10 30 0 10 20 30 40 50 60 70 80 90 100 EFFICIENCY 87081 G02 VIN 16V VOUT 12V HCM DCM CCM VIN 14 5V VOUT 14 5V HCM DCM CCM IOUT A 0 01 0 1 1 10 30 0 10 20 30 40 50 60 70 80 90 100 EFF...

Page 9: ...AT VBAT2 WITH BATTERY DISCONNECTED 500 s DIV 87081 G11 LT8708 IL 10A DIV LT8708 1 IL 10A DIV VBAT1 14 5V VBAT2 REGULATED TO 14 5V LOAD STEP 10A TO 25A LOAD APPLIED AT VBAT2 WITH BATTERY DISCONNECTED...

Page 10: ...to the same voltages as the master LT8708 FBIN Pin 8 VIN Feedback Pin This pin is connected to the input of error amplifier EA3 Typically connect this pin to LDO33 to disable the EA3 FBOUT Pin 9 VOUT...

Page 11: ...NTVCC will be powered from this pin When EXTVCC is lower than 6 4V the INTVCC will be powered from VINCHIP It is recommended to use the same value bypass cap as the master LT8708 CSPOUT Pin 30 The Inp...

Page 12: ...P Pin 38 Average VOUT Current Regulation Pin This pin servos to 1 207V to regulate the average output current based on the ICP and ICN voltages Always connect a 17 4k resistor in parallel with a compe...

Page 13: ...VCC INTVCC EN 1 221V 6 4V RSHDN2 SHDN RSHDN1 3 3V RSENSE CSN CSP SWEN VINCHIP CSNIN CSPIN IMON_INN MODE CLKOUT SYNC RT IMON_INP RVS DIR RVS VC EA5 EA6 EA4 EA3 1 209V IMON_INP EA1 EA8 1 21V IMON_INN 1...

Page 14: ...urrent limits to the system Each LT8708 and LT8708 1 connected in parallel is hereon referred to as a phase the master and slave VIN current is referred to as IIN MASTER and IIN SLAVE respectively For...

Page 15: ...CSNOUT CSPOUT IMON_OP CSPIN CSNIN VINCHIP SYNC RVSOFF ICP ICN DIR SWEN LT8708 1 SLAVE ICN ICP CLK1 CLK2 RVSOFF SWEN FWD 1 6V RVS 1 2 CSNOUT CSPOUT IMON_OP CSPIN CSNIN VINCHIP SYNC RVSOFF ICP ICN DIR S...

Page 16: ...sistor in parallel with a compensation network from this pin to ground on the LT8708 1 The IMON_ON pin is used to monitor the negative IOUT SLAVE The current limiting function of this pin on LT8708 1...

Page 17: ...TCHER DISABLED INTVCC AND LDO33 OUTPUTS ENABLED SWEN AND SS PULLED LOW CHIP OFF SHDN 1 181V OR VINCHIP 2 5V OR TJUNCTION 165 C SWITCHER OFF LDOs OFF SWEN PULLED LOW INTVCC AND GATEVCC 4 81V AND LDO33...

Page 18: ...l error amplifiers EA1 EA6 This allows the average IOUT SLAVE to quickly follow the aver age IOUT MASTER without saturating the slave s regulation loop During soft start the LT8708 1 employs the same...

Page 19: ...lifiers combine to drive VC accord ing to Table 4 with the highest priority being at the top Table 4 Error Amp Priorities TYPICAL CONDITION PURPOSE if IMON_INN 1 21V then VC Rises to Reduce Negative I...

Page 20: ...e transfer functions1 shown in Figure 5 and Figure 6 The currents are measured sensed by the differential CSPOUT CSNOUT pin voltages for each phase and the information is sent from the master to the s...

Page 21: ...r Typically the master is configured to limit its own input current IIN MASTER thus limiting the command current to the slave However since the slave has its own independent input current sensing OPER...

Page 22: ...LT8708 s RSENSE1 value See Configuring the IIN SLAVE Current Limits section for details MULTIPHASE CLOCKING A multiphase application usually has switching regulators operating at the same frequency b...

Page 23: ...rs Connect identical resistor divider networks on SHDN as well as on VINHIMON and VOUTLOMON if used If not used connect VINHIMON to GND and or VOUTLOMON to the LT8708 1 s LDO33 Connect the LT8708 1 s...

Page 24: ...rature ranges Many ceramic capacitors particularly 0805 or 0603 case sizes have greatly reduced capacitance at the desired operating voltage CIN and COUT Selection VIN Capacitance Discontinuous VIN cu...

Page 25: ...the peak total RMS input current in buck operation and the peak total RMS output current in boost operation are reduced linearly inversely proportional to the number of phases used It is important to...

Page 26: ...rent as requested by the master With equal IIN SLAVE and IIN MASTER limits slight output current mismatch and hence slight thermal imbalance can still happen due to device tolerance Bench evaluation s...

Page 27: ...nt sense voltage of V CSPOUT VCSNOUT M 4A 10m 40mV Locate 40mV along the X axis of Figure 11 The corresponding ICP and ICN voltages are 1V and 0V respectively These ICP and ICN voltages are sent from...

Page 28: ...F of capacitance is usually necessary LOOP COMPENSATION To compensate a multiphase system of the LT8708 and LT8708 1 s most of the initial compensation component selection can be done by analyzing the...

Page 29: ...N Pin section for proper ways to connect or drive the SWEN pin in a multiphase system Instead an external comparator chip can be used to mon itor undervoltage conditions and its output drives the comm...

Page 30: ...N_INN selection IMON_INP and IMON_INN are used to provide current limits for the LT8708 1 only They are set to be equal to the maximum per phase VIN current in the forward and reverse direc tions resp...

Page 31: ...3 H WURTH 701014330 XOR DIODES INC 74AHC1G86SE 7 M5 M7 T2N7002AK TOSHIBA C IN4 C IN5 C OUT4 C OUT6 SUNCON 18 F 40V 40HVP18M SEE THE UNI AND BIDIRECTIONAL CONDUCTION SECTION OF THE LT8708 DATA SHEET D...

Page 32: ...tion VBAT1 12V VBAT2 14V IOUT 30A Reverse Conduction VBAT1 12V VBAT2 14V IIN 30A Direction Change with VBAT1 12V VBAT2 12V 3 s DIV 87081 TA03b IL1 AND IL2 10A DIV LT8708 SW1 10V DIV LT8708 1 SW1 10V D...

Page 33: ...74AHC1G86SE 7 M5 M7 T2N7002AK TOSHIBA C IN4 C IN5 C OUT6 C OUT7 SUNCON 18 F 40V 40HVP18M SEE THE UNI AND BIDIRECTIONAL CONDUCTION SECTION OF THE LT8708 DATA SHEET D B3 D B4 TO LT8708 1 S BOOST1 TO LT...

Page 34: ...ange Phase 1 to 4 Inductor Current 56ms DIV 87081 TA04b DIR 5V DIV PHASE 1 IL 20A DIV PHASE 2 IL 20A DIV PHASE 3 IL 20A DIV 2 s DIV 87081 TA04c PHASE 1 TO PHASE 4 IL 5A DIV TYPICAL APPLICATIONS 4 Phas...

Page 35: ...0 R 0 125 TYP UHG QFN 0417 REV A 1 00 TYP 1 00 TYP 0 20 REF DETAIL A 0 40 0 05 0 25 0 05 0 50 BSC 0 00 0 05 0 75 0 05 NOTE 1 ALL DIMENSIONS ARE IN MILLIMETERS ANGLES IN DEGREES 2 COPLANARITY APPLIES T...

Page 36: ...4 2 5m 1 F 100nF 47nF 100 20k 340k DIR_CTRL 340k 17 4k 200 4 7nF 17 4k 200 4 7nF 4 7 F 127k 100k 54 9k 470pF 12nF 10k 365k 1 F 4 7nF 17 4k 4 7nF 17 4k 4 7nF 17 4k 4 7 F 3 3 4 7 F 100nF 47nF 100 COUT6...

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