13
Address (15 bits)
Bits
Description
0x0024
15 – 14
13 – 12
11 – 10
9 – 8
7 – 6
5 – 4
3 – 2
1 – 0
LML1_S3S[1:0]: Sample source in position 3, when direction of Port 1 is RF2BB.
11 – Sample in frame position 0 is BQ
(default)
10 – Sample in frame position 0 is BI
01 – Sample in frame position 0 is AQ
00 – Sample in frame position 0 is AI
LML1_S2S[1:0]: Sample source in position 2, when direction of Port 1 is RF2BB.
11 – Sample in frame position 0 is BQ
10 – Sample in frame position 0 is BI
(default)
01 – Sample in frame position 0 is AQ
00 – Sample in frame position 0 is AI
LML1_S1S[1:0]: Sample source in position 1, when direction of Port 1 is RF2BB.
11 – Sample in frame position 0 is BQ
10 – Sample in frame position 0 is BI
01 – Sample in frame position 0 is AQ
(default)
00 – Sample in frame position 0 is AI
LML1_S0S[1:0]: Sample source in position 0, when direction of Port 1 is RF2BB.
11 – Sample in frame position 0 is BQ
10 – Sample in frame position 0 is BI
01 – Sample in frame position 0 is AQ
00 – Sample in frame position 0 is AI
(default)
LML1_BQP[1:0]: BQ sample position in frame, when direction of Port 1 is BB2RF.
11 – BQ sample position is 3
(default)
10 – BQ sample position is 2
01 – BQ sample position is 1
00 – BQ sample position is 0
LML1_BIP[1:0]: BI sample position in frame, when direction of Port 1 is BB2RF.
11 – BI sample position is 3
10 – BI sample position is 2
(default)
01 – BI sample position is 1
00 – BI sample position is 0
LML1_AQP[1:0]: AQ sample position in frame, when direction of Port 1 is BB2RF.
11 – AQ sample position is 3
10 – AQ sample position is 2
01 – AQ sample position is 1
(default)
00 – AQ sample position is 0
LML1_AIP[1:0]: AI sample position in frame, when direction of Port 1 is BB2RF.
11 – AI sample position is 3
10 – AI sample position is 2
01 – AI sample position is 1
00 – AI sample position is 0
(default)
Default
: 11100100 11100100
0x0025
15 – 12
11 – 8
7 – 5
4 – 0
Reserved
LML1_BB2RF_PST[4:0]: Number of clock cycles to wait after burst stop is detected
in JESD207 mode on Port 1 and direction of Port 1 is BB2RF. Unsigned integer.
Possible values are 0 – 31,
default
is 1.
Reserved
LML1_BB2RF_PRE[4:0]: Number of clock cycles to wait after burst start is detected
in JESD207 mode on Port 1 and direction of Port 1 is BB2RF. Unsigned integer.
Possible values are 0 – 31,
default
is 1.
Default
: 00000001 00000001
0x0026
15 – 12
11 – 8
7 – 5
4 – 0
Reserved
LML1_RF2BB_PST[4:0]: Number of clock cycles to wait after burst stop is detected
in JESD207 mode on Port 1 and direction of Port 1 is RF2BB. Unsigned integer.
Possible values are 0 – 31,
default
is 1.
Reserved
LML1_RF2BB_PRE[4:0]: Number of clock cycles to after burst start is detected in
JESD207 mode on Port 1 and direction of Port 1 is RF2BB. Unsigned integer.
Possible values are 0 – 31,
default
is 1.
Default
: 00000001 00000001
Summary of Contents for LMS7002M Series
Page 2: ......
Page 79: ...75 A Ap pp pe en nd di ix x 2 2 Control Block Diagrams ...
