LG U8138, Service Manual

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3. TECHNICAL BRIEF
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3.2.2 Block Description
GAM Controller(GAMCON)
The GAM Controller (GAMCON) is responsible for clock gating and distribution within the GAM
module. GAMCON receives the HCLK from SYSCON and distributes to GRAPHCON, GRAM, PDI and
CDI. GAMCON also distributes the GAM reset signal to GRAPHCON, GRAM, PDI and CDI. The reset
signals CIRES_N and PDIRES_N are distributed from GAMCON to the camera and display module
respectively, see Figure. The CIPCLK is used to clock the received data into the camera data
interface. The CIPCLK can be in the range of 100 kHz to 16 MHz.
Graphics RAM (GRAM) Block
GAM includes 160 kB of graphics memory (GRAM) in order to support display screen sizes of QCIF +
alfa display size and three frame buffers when decoding QCIF video.
The GRAM can be accessed in 8, 16 or 32-bit mode. Write access takes a single AHB clock cycle.
Non-sequential read and the first access of a sequential read access takes two AHB clock cycles.
Subsequent sequential read access take a single AHB clock cycle.
The GRAM contains both frame buffer and temporary data. There are three image areas with one
used for normal MMI graphics and the other two areas used for still images, video frames or camera
frames. The three image areas can be combined into one frame buffer.
GRAM is required to transfer a VGA (640 by 480 pixels) image from the camera data interface (CDI)
over DMA at 100 MBit/s, within a 50 ms timeframe. The GRAM is used as a buffer, but the average
transfer bandwidth required is approximately 3 Mword/s (32-bit word), that is 12 MByte/s.
Graphics Controller (GRAPHCON) Block
GRAPHCON is controlled by the application CPU and can perform operations on pixels and image
areas. Images can be moved and merged with other images and text.
The GRAPHCON block receives graphical objects from GRAM and performers the appropriate
graphical manipulation. The resulting data is transfers to the display interface (PDI). GRAPHCON can
receive images from the camera data interface (CDI) and send them to the PDI automatically.
GRAPHCON performs conversion from YUV to RGB and can scale (zoom) still or video images.
Programmable Display Interface (PDI) Block
The programmable display interface (PDI) is designed to interface both parallel and serial display
modules. The display data is transferred from the 32 word FIFO on GAMCON to the display module
via the PDI block. The PDI block is built around a micro controller and executes 16-bit instruction
words to individually control the I/O ports. It has a 128 byte program memory, programmable by the
CPU, which can store up to 64 instructions.
The CPU transfers all set-up and control data to the display. Data is transferred to PDI as 32-bit words,
which in turn writes 8-bit data to the display. The programmable PDI block is configured at the
software build stage, to support either parallel interface such as PPI or serial interface such as SSI or
I2C.