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U301
: Audio Codec,U303: 3.3V output regulator ,U302: Audio digital amplifier ,U707:Analog switch,
X300
: 12.288 MHz crystal Oscillator
The codec inputs are three path, one is from MIDI output, another is from ABB ear_out, another is
from SH7300 via PCM Interface. and DBB(calypso_c035) controls audio codec gain by I2C BUS
The codec output s are divided two path, one is speaker path and the other is earphone path. The
earphone path is directly interfaced to headset and speaker path is interfaced to external digital
amplifier (U302)
The external digital amplifier amplifies SPK_L and SPK_R signal and make differential output for
single speaker. The external digital amplifier and analog switching IC which switches speaker path and
receiver path operations are controlled by Calypso GPIO(SPK_EN).
F. DSP Pin description
2. TECHNICAL BRIEF
- 30 -
Signal
I/O
Description
Connection
D(0:15)
I
Host Data Bus
DBB(calypso)
_WR
I
Host write strobe
DBB(calypso)
_RD
I
Host Read strobe
DBB(calypso)
_A(2)
I
HostCommand/Data control
DBB(calypso)
YUV(7:0)
O
Camera data bus
DBB(calypso)
C_HSYNC
I
Camera HSYNC control
Camera module
C_PCLK
o
Camera Pixel clock
Camera module
C_VSYNC
I
Camera HSYNC control
Camera module
DSP_INT
O
DSP interrupt
DBB(calypso)
THEXT
I
Extended through mode select
Fixed ‘LOW’
MFIMD
I
Normal boot/80 system I/F select
DBB(calypso)
THCS
I
Through mode select
Fixed ‘HIGH’
DAC_DAT
O
I2S format serial data
Audio codec
NAND_WE
O
Nand Flash Write enable
Driven LowGND)
CLE
O
NAND Flash Command Latch enable
Nand Flash
NAND_RE
O
Nand Flash Read enable
Nand Flash
N_D(0:7)
O
Nand Flash data
Nand Flash
CAM_PWR_EN
O
Camera power enable
Camera module
C_RESET
O
Camera Reset
Audio codec
CODEC_BCLK
I/O
I2S serial-bit clock.
Audio codec
DAC_LRC
O
I2S DAC-word clock signal
Audio codec
ADC_DAT
I
I2S format serial data input
Audio codec
Table 8. Pin description
Summary of Contents for T5100
Page 1: ...Service Manual Model T5100 Service Manual T5100 P N Date June 2004 Issue 1 0 ...
Page 24: ...2 TECHNICAL BRIEF 25 Figure 15 Power Supply Scheme ...
Page 71: ...4 RF PART TROUBLESHOOTING 72 4 2 Trouble Shooting of Receiver Part Figure 48 RF ...
Page 83: ...5 DISASSEMBLY INSTRUCTION 84 5 1 Disassembly 5 DISASSEMBLY INSTRUCTION 1 2 ...
Page 84: ...5 DISASSEMBLY INSTRUCTION 85 ...
Page 85: ...5 DISASSEMBLY INSTRUCTION 86 ...
Page 86: ...5 DISASSEMBLY INSTRUCTION 87 ...
Page 87: ...5 DISASSEMBLY INSTRUCTION 88 ...
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Page 95: ...5 DISASSEMBLY INSTRUCTION 96 ...
Page 96: ...5 DISASSEMBLY INSTRUCTION 97 ...
Page 97: ...5 DISASSEMBLY INSTRUCTION 98 ...
Page 100: ...6 Download 101 2 Click the Add button Then choose m0 file which is going to download ...
Page 104: ...6 Download 105 6 Wait for downloading to be finished ...
Page 120: ... 121 8 CIRCUIT DIAGRAM 8 1 RF Interface ...
Page 121: ... 122 2 3 8 2 Base Band Interface ...
Page 123: ... 124 2 2 300mA 12 8 150mA 4 11 12 6 3 150mA 3 5 10 7 9 300mA 4 N9 NC23 8 4 DSP ...
Page 124: ... 125 Fe r r i t e be a d BLM18PG121SN1D 8 5 Memory Interface USB interface ...
Page 125: ... 126 8 6 MIDI Audio ...
Page 126: ... 127 8 7 I O Receptacle USB Interface IrDa Interface D G S ...
Page 127: ... 128 8 8 Keypad VA3 VA2 VA1 ...
Page 128: ... 129 9 PCB LAYOUT 9 1 Main Top ...
Page 129: ... 130 9 2 Main Bottom ...
Page 130: ... 131 9 3 Keypad Top ...
Page 131: ... 132 9 4 Keypad Bottom ...
Page 135: ... 136 12 EXPLODED VIEW REPLACEMENT PART LIST 12 1 EXPLODED VIEW ...
Page 136: ... 137 12 1 EXPLODED VIEW ...