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4-5
MAJOR IC INTERNAL BLOCK DIAGRAM AND PIN DESCRIPTION
1. IC501 (MT8553) PIN DESCRIPTION
1-1. Pin Function
PIN NO.
SYMBOL
TYPE
DESCRIPTION
SERVO
E4
AUX1
Analog I/O
Auxiliary Input. Alternateive Function : Signal Monitoring
F6
AVDD12
Analog Power(1.2V)
Power Pin
D6
AVDD33_1
Analog Power(3.3V)
Power Pin
E7
AVDD33_3
Analog Power(3.3V)
Power Pin
K1
FECFREQ
3.3V LVTTL I/O,
5V-tolerance,
Slow slew,
2, 4, 6, 8 mA PDR,
75K pull-up (3.3 V)
Frequency selection signal output, or LDD serial interface data
or 12C SDA.
The pin is spike-free at power-on stage.
K3
FECMOD
3.3V LVTTL I/O,
5V-tolerance,
Slow slew,
2, 4, 6, 8 mA PDR,
75K pull-up (0 V)
High frequency modulation mode selection signal output,
or LDO serial interface command enable.
The pin is spike-free at power-on stage.
Multifunction: Line-in input data
L6
FEDMO
Analog Output
Disk motor control output. DAC output.
L2
FEEJECT_
3.3V LVTTL I/O,
5V-tolerance,
6 mA driving,
75K pull-up (3.3 V)
Eject/stop key input, active low.
The pin is spike-free at power-on stage.
Alternate function : General IO.
P4
FEFG
3.3V LVTTL I/O,
5V-tolerance,
6 mA PDR,
75K pull-up (3.3 V)
Motor Hall sensor input.
The pin is spike-free at power-on stage.
N2
FEFMO
Analog Output
Feed motor 1 control. DAC output.
N3
FEFMO2
Analog Output
Feed motor 2 control. DAC output.
L5
FEFMO3
Analog I/O
Feed motor 3 control. DAC output.
Alternative Function : Auxiliary servo input.
L4
FEFMO4
Analog I/O
Feed motor 4 control. DAC output.
Alternative Function : Auxiliary servo input.
H3
FOO
Analog Output
Focus servo output.
PDM output of focus servo compensator.
A4
FPDOCD
Analog Input
Laser Power Monitor Input for CD APC / Differential negative
input
B4
FPDODVD
Analog Input
Laser Power Monitor Input for DVD APC / Differential positive
input
J2
FEGAINSW1
Analog Output
Read gain switch 1.
J3
FEGAINSW2
Analog Output
Read gain switch 2.
P2
FEGAINSW3
Analog Output
Read gain switch 3.
M2
FEGIO0
3.3V LVTTL I/O,
5V-tolerance,
2, 4, 6, 8mA PDR,
75K pull-down (0 V)
LDD serial interface data.
The pin is spike-free at power-on stage.
The pin is not allowed to pull-up in circuit layout.
Alternate function :
1. Internal monitored signal output
2. General IO
K4
FEGIO1
3.3V LVTTL I/O,
5V-tolerance,
2, 4, 6, 8 mA PDR,
75K pull-down (0 V)
LDD serial interface CLK.
The pin is spike-free at power-on stage.
The pin is not allowed to pull-up in circuit layout.
Alternate function :
1. Internal monitored signal output
2. General IO
Summary of Contents for SoundPlate lab550h
Page 65: ...2 52 3 AUDIO PART 1 DSP I2C IC401 SPI_SCL IC401 SPI_DATA 6 7 6 7 ...
Page 66: ...2 53 4 AUDIO PART 2 DSP I2S M_LRCK M_BCK M_DATA0 8 9 10 M_BCK M_DATA0 10 8 9 ...
Page 67: ...2 54 5 HDMI PART 12 11 H_SDA H_SCL 11 12 ...
Page 82: ...2 84 2 83 2 MAIN P C BOARD TOP VIEW BOTTOM VIEW ...
Page 83: ...2 86 2 85 3 FRONT P C BOARD 4 FRONT KEY P C BOARD TOP VIEW TOP VIEW BOTTOM VIEW BOTTOM VIEW ...
Page 87: ...3 4 1 Remove the Chassis Main Assembly Fig 5 Chassis Main Assembly Chassis Main Assembly ...
Page 90: ...3 7 1 Remove the 2 screws securing the KEY PCB 2 Remove the KEY PCB Fig 10 KEY 1 ...
Page 91: ...3 8 ...
Page 95: ...3 16 3 15 ...
Page 107: ...4 12 ...