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3. TECHNICAL BRIEF
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Copyright © 2012 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
LG530G
32/87
Figure 3-6-3 Function Block Diagram
data using the cache register.
The devices provide two innovative features: page re-program and multiplane page re-program. The
page re-program allows to re-program one page. Normally, this operation is performed after a
previously failed page program operation.
Similarly, the multiplane page re-program allows to re-program two pages in parallel, one per each
plane. The first
page must be in the first plane while the second page must be in the second plane; the multiplane
page re-program
operation is performed after a previously failed multiplane page program operation. The page re-
program and multiplane page re-program guarantee imporve performance, since data insertion can
be omitted during re-program operations, and save ram buffer at the host in the case of program
failure.
The devices support the ONFI1.0 specfication and come with four sequrity features:
- OTP (one time programmable) area, which is a restricted access area where sensitive data/code can
be stored
permantely.
- Serial number (unique identifier), which allows the devices to be uniquely indentified.
- Read ID2 extention
Figure 3-6-3 Function Block Diagram
ADDRESS
REGISTER/
COUNTER
COMMAND
INTERFACE
LOGIC
2048 Mbit + 64 Mbit
NAND Flash
MEMORY ARRAY
COMMAND
REGISTER
DATA
REGISTER
PAGE BUFFER
X
D
E
C
O
D
E
R
BUFFERS
IO
WE#
CE#
WP#
RE#
Y DECODER
PROGRAM
ERASE
CONTROLLER
HV GENERATION