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3. TECHNICAL BRIEF
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Copyright © 2012 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
LG530G
7/87
3.2.3 Power Amplifier Module
The SKY77196 Power Amplifier Module (PAM) is a fully matched, 14-pad, surface mount module
developed for Wideband Code Division Multiple Access (WCDMA) applications. This small and efficient
module packs full WCDMA Band II and Band V coverage into a single compact package. The
SKY77196 meets the stringent spectral linearity requirements of WCDMA transmission, with high
power added efficiency for power output to 28.5 dBm (Band II) and 28 dBm (Band V). The SKY77196
meets the stringent spectral linearity requirements of High Speed Downlink Packet Access (HSDPA)
data transmission with high power added efficiency. A directional coupler is integrated into the
module thus eliminating the need for any external coupler.
The single Gallium Arsenide (GaAs) Microwave Monolithic Integrated Circuit (MMIC) contains all active
circuitry in the module. The MMIC contains on-board bias circuitry, as well as input and interstage
matching circuits. Output match into a 50-ohm load is realized off-chip within the module package to
optimize efficiency and power performance.
The SKY77196 PAM is manufactured with Skyworks’ InGaP GaAs Heterojunction Bipolar Transistor
(HBT) BiFET process that provides for all positive voltage DC supply operation while maintaining high
efficiency and good linearity. No VREF voltage is required. Power down is accomplished by setting the
voltage on VENABLE to zero volts. No external supply side switch is needed as typical “off” leakage is
a few microamperes with full primary voltage supplied from the battery.
Figure 3.2.3.1 SKY77196 Functional Block Diagram
3.2.3 POWER AMPLIFIER MODULE
Figure 3.2.3.1 SKY77196 Functional Block Diagram
Bias and GAIN CONTROL
VEN_BAND_II (6)
(6) OUT_BAND_II
(14) OUT_BAND_V
VEN_BAND_V (5)
IN_BAND_II (7)
IN_BAND_V (1)
VCC1(4)
VCC2(12)
CPL_OUT (8)
VMODE1 (3)
VMODE0 (2)
PA
PA
DA
DA
MMIC
MODULE
OUTPUT
MATCH
INPUT
MATCH
INTER-STAGE
MATCH
INTER-STAGE
MATCH
INPUT
MATCH
OUTPUT
MATCH