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LGE Internal Use Only
Copyright © 01 LG Electronics. Inc. All right reserved.
Only for training and service purposes
3. TECHNICAL BRIEF
3. TECHNICAL BRIEF
3.5.2.2 Transmitter
The GMSK transmitter supports power class 4 for GSM850 or GSM900 as well as power class 1 for DCS1800 or
PCS1900. The digital transmitter architecture is based on a fractional-N sigma-delta synthesizer for constant
envelope GMSK modulation. This configuration allows a very low power design without any external
components.
Up- and down-ramping is performed via the ramping DAC connected to VRAMP.
Figure. 3.5.3 TRANSMITTER CHAIN BLOCK DIAGRAM
RF synthesizer
RF synthesizer
The RF subsystem contains a fractional-N sigma-delta synthesizer for the frequency synthesis. Respective to
the chosen band of operation the phase locked loop (PLL) operates at twice or forth of the target signal
frequency. In receive operation mode the divided output signal of the digital controlled oscillator output (DCO)
serves as local oscillator signal for the balanced mixer. For transmit operation the fractional-N sigma-delta
h i
i
d
d l i
l
h
h
/f
i
l Th
MH
f
i
l f
ͽͶ͑ͺΟΥΖΣΟΒΝ͑ΆΤΖ͑ΟΝΪ
Z`VX[^
synthesizer is used as modulation loop to process the phase/frequency signal. The 26 MHz reference signal of
the phase detector incorporated in the PLL is provided by the reference oscillator.
3. TECHNICAL BRIEF
3.5.2.2 Transmitter
The GMSK transmitter supports power class 4 for GSM850 or GSM900 as well as power class 1 for DCS1800 or
PCS1900. The digital transmitter architecture is based on a fractional-N sigma-delta synthesizer for constant
envelope GMSK modulation. This configuration allows a very low power design without any external
components.
Up- and down-ramping is performed via the ramping DAC connected to VRAMP.
Figure. 3.5.3 TRANSMITTER CHAIN BLOCK DIAGRAM
RF synthesizer
RF synthesizer
The RF subsystem contains a fractional-N sigma-delta synthesizer for the frequency synthesis. Respective to
the chosen band of operation the phase locked loop (PLL) operates at twice or forth of the target signal
frequency. In receive operation mode the divided output signal of the digital controlled oscillator output (DCO)
serves as local oscillator signal for the balanced mixer. For transmit operation the fractional-N sigma-delta
h i
i
d
d l i
l
h
h
/f
i
l Th
MH
f
i
l f
ͽͶ͑ͺΟΥΖΣΟΒΝ͑ΆΤΖ͑ΟΝΪ
Z`VX[^
synthesizer is used as modulation loop to process the phase/frequency signal. The 26 MHz reference signal of
the phase detector incorporated in the PLL is provided by the reference oscillator.
