BLOCK DIAGRAM
- 9 -
Copyright
2007 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
Main Vi deo
In put
A
D
D
AC IN
Pow
e
r
control
5VST
18. 5V
18
V
M
1
8
VM(LCM/Inverter/USB Pow
e
r)
Sub Video
In put
8MB
8MB
Frame Bu
ff
e
r
Memory(SDRAM)
5VC
2.5V
5VST
USB UP
LCM/Inverter/etc
. Con
trol signal
&
A
udio L
ine out
Scaler
(MX88
L285U)
D-SUB
DVI-I
DVI-D
Display
Output
ADC
(AD9888
205M
H
z
)
ADC
(AD9883
140M
H
z
)
Pow
e
r
control
V
id
eo Out
CONNECTING
B/D
SCALER
B/D
POWER
B/D
8MB
Frame Bu
ff
e
r
Memory(SDRAM)
Composite
Video
S-Video
Y Pb Pr
DVD(480i)
18
V
C
18
V
A
2.5V
5VC
5VST
DC/DC
(LM2676
5V)
DC/DC
(LM2596
5V)
DC/DC
(LM2596
A
d
justab
le
)
Vi
d
e
o
Out
Deinterlacer
(FLI2310)
Vid eo Decoder
(VPC3230D)
Tuner
A
V
B/D
Flash
ROM
(256KB)
Source
Flash
ROM
(512KB)
OSD
MCU
8bit
Latch
A
u
dio Decoder
(MSP3410G-B1
1)
USB UP
USB UP
SIF
VIF
Y
C
18
V
A
5
V
A
TMDS RX
(SIL161B)
TMDS RX
(SIL161B)
TMDS TX
(SIL160)
2
3
inch
WUXG
A
LCD Module
(1920
1200)
&
x
Inverter
18
V
-L
C
M
18
V
M
TMDS
USB UP
Control Sign
a
l
5VST
Remote
Remote
5VST
AUDIO JACK
B/D
BRIDGE B/D
USB
HUB
KEY
CONTROL
B/
D
POWER KEY
B/D
1
8
V
-INV
T
DTV(~1080i) YPbPr
DTV &
DV
D
A
u
dio in
PC 1
A
u
dio
in
PC 2
A
u
dio
in
USB
UP
AV
Au dio
S
p
e
a
ker-Out
Head
Phone
S
p
e
a
ker-o
u
t
L
in
e-out
L
in
e-out
J10
J1
J2
U1
U12
U2
U14
U17
SPIN(23.0)
U9
U27
U301
U302
J706
U601
J703
J705
J701
VPC-
Y(7..0)
VPC-C(7..0)
SPIN(
15..0)
AV
SCA
L
E
R
7
4
A
LVC162839
7
4
A
LVC162839
7
4
A
L
VC162839
4
8
BIT
A
V
PIN(15..0)
U7
U15
U18
MPINA (
MPINB( 23 .. 0)
23 .. 0)
A
V
PIN
(15..0)
SPIN( 23..0)
MPINA ( 15 .. 0)
15 .. 0)
SPIN(
HPTV
IN(15..0)
