LGE Internal Use Only
Copyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
3. TECHNICAL BRIEF
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3.1 KP500 Functional Block diagram
The functional component arrangement is mentioned below diagram.
3. TECHNICAL BRIEF
Figure 1 KP500 Functional block diagram
PMB6821(PM IC)
BB IC(PMB8877)
(2G NAND +
1G DDR SDRAM)
Charging IC
-SD + SIM Socket
TRANSCEIVER
PMB6272
DGM1110M014
BT IC
BCM2048SB0
Vibrator
LCD, 3.0"
262K TFT WQVGA
KEY PAD
KEY Back Light
Charge Pump
(SC654ULTRT)
LED Matrix Module
SD1 (1.35V)
SD2(1.8V)
SD2(1.8V)
VAUX (2.9V)
VIO(2.62V)
VSIM(2.9V)
VMME (2.9V)
VUMTS(2.85V)
VUSB(3.1V)
VLED (2.9V)
VAUDIOa(2.5V)
VAUDIOb(2.5V)
VRF1(2.85V)
VRF2(1.53V)
VRF3(2.70V)
VPLL(1.35V)
VRTC(2.0V)
VVIB(2.8V)
VBAT
DCS/PCS
GSM850/900
FEM
PAM(SKY77340)
3M CAM
FE1 FE2
PA_MODE
PA_BAND
TXON_PA
PA_LEVEL
AFC
I/I_/Q/Q_
RF_EN
RF_CLK
RF_DA
26M_MCLK
26M_TCXO
ANT
BPF
BT ANT
FM ANT
UART
/
/
I2S
/
BT_CLK
ADD(0:29)
/
DATA(0:15)
/
32kHz
HEADSET MIC
HEADSET RECEIVER
MAIN MIC
FM
RADIO
FM
RADIO
AUIDO AMP(MAX9877)
EPN11
EPP11
EPPA11
EPPA21
RXIN-
RXIN+
INA1
INA2
HPL
HPR
MAIN SPEAKER
OUT-
OUT+
MIC1(P/N)
MIC2(P/N)
VMICP/N
I2C
/
INB1/2
MI
X
E
R
BYPASS
PRE
-A
M
P
Match
Match
Match
Match
Controller
Battery
CHG_EN
T_IN1
VCHG
VUSB_USB
I2C
/
(LED CTRL : 5 ea)
I2C
/
I2C
/
I2C
/
VBAT
END_KEY
COL
ROW
KEY_COL
KEY_ROW
2V11_RTC
2V11_RTC
B/UP BAT.
CAM_ I2C
/
I2C1
I2C1
I2C1
I2C1
CIF
MMC I/F
/
MMC I/F
VIB_EN
GPIO
PA_MODE
PA_BAND
TXON_PA
PA_LEVEL
UART
I2S
RF INTERF
A
C
E
Memory
Pin.01
FM_ANT
Pin.02
I/
O CO
NNECTOR
Pin.03
Pin.04
Pin.05
Pin.06
Pin.07
Pin.08
Pin.11
Pin.12
Pin.13
Pin14
Pin.15
Pin.16
Pin.17
Pin.18
Pin.09
Pin.10
H/S MIC & HOOK_DET
H/S_LEFT
H/S_RIGHT
USB_M
USB_P
JACK_DETECT
VBAT
VBAT.
RPWRON
VCHG
DSR
VBUS_USB
UART_TX
UART_RX
DIF
/
DIF
Touch Window
3-Axis Accelerometer
CAM_I2C
CAM_I2C
I 2C
/
I 2C
KEY_EN
GPIO
KP500 Block Diagram