1.2 Block Diagram
54
Data
VREF, VREFC
VREF33
BIAS
WPLL
ADIP
Detector
Detector
Counter
Strobe
Slicer
Generator
Data
Demodulate
Servo
CD-ROM
Decoder
DVD
PI-ECU
DVD
PO-ECU
DRAM
MCIF
ATAPI
AUDIO
DRAM
Interface
Clock
Generator
Test
Control
VIBIAS
EFMP
EFMN
JFH
DCLPF[2:0]
DRLPF[2:0]
VISTRB
IP1LPPIN
IP2MIRR
RDGATE
LOWZB
IDGATE
RFHLD
W1LPF[2:0]
ADC
ADIPVRT
LPP
Wobble
WOBSIG
Jitter
CD-DSP
CAV
AUDIO
NRZI,NRZIB
LVDS
DCLK,DCLKB
WRGATE2/B
SRFH
WRSTOP
Sample
Hold
WBLSH
MPDSH
WFPDSH
RFPDSH
CD-ROM
CD
Encoder
Modulator
LSRON
DAC
ADC
FE
PE
TE
LPSA
LPSB
MONANA[1:2
]
FOD
DAVC
TRD
XCI
XCO
Serial I/F
SDATA
RFDEN
SCLK
WDEN
LDBUSY
FEMCK
TEST[3:0]
MRSTB
TESTB[1:2]
ROUT
DOUT
LOUT
DVD
Descramble
DVD
Scramble
Auth
BCA
SSEQ
MSEQ
RA[12.10:0]
DWE
RD[15:0]
DRAS
DCAS
RAMCL
DQMU
DQML
DACKB
CS3FXB
DREQ
CS1FXB
PDIAGB
DASPB
DA2
IOCS16B
IORDY
ZIOWB
HINTRQ
HRSTB
ZIORB
DATA [15:0]
DA1
DA0
SFG
TZC
BLANK
DEFECT
LED
LNDTRK
LDD
TLD
JFF[1:0]
DFF[1:0]
TCSHSPBLV
LSRERR
DCKE
W2LPF[2:0]
H8S
CPU
ADC
PUTEMP
DRVOFSP
ADGATEB
INT0B
FOK
CPWRB
CPRDB
UCS2B
A[20:0]
CPU[15:0]
INT1B
INT2B
NMI
UCS0B
UCS1B
CPRDB
CPWRB
A[20:0]
CPU[15:0]
EEPRRCE
CSEL
CSW1
CSW2
CSW3
STNBYON
SLEEPHD
DRVEN2
ARSTB
LOADIN
LOADOUT
LIMIT
HEATRUN
DSLADJ2
DSLADJ1
LEDG
AMUTE
FMSW
SDRAM
16Mbit
ZCS
SCK
SCI
SCO
UCS3B
INT3B
SRFL
TCPH
TIBH
BCENT
VRCD2N
TVDP
TVDN
ADC
WAI T
EJECTSW
ACTRST
ACTFLG
DAC
SIGM
SPD
ADIPINP
ADIPVR1
VRDC2NREF
DRVEN1
DRVOFSM