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Only for training and service purposes
LGE Internal Use Only
3. TECHNICAL BRIEF
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LGE Property
3.19 RF synthesizer
The transceiver contains a fractional-N sigma-delta synthesizer for the frequency synthesis in the RX operation
mode. For TX operation mode the fractional-N sigma-delta synthesizer is used as Sigma-Delta modulation loop
to process the phase/frequency signal. The 26MHz reference signal is provided by the internal crystal oscillator.
This frequency serves as comparison frequency of the phase detector and as clock frequency for all digital
circuitry.The divider in the feedback path of the synthesizer is carried out as a multi-modulus divider (MMD). The
loop filter is fully integrated and the loop bandwidth is about 100 kHz to allow the transfer of the phase
modulation. The loop bandwidth is automatically adjusted prior to each slot (OLGA2). To overcome the statistical
spread of the loop filter element values an automatic loop filter adjustment (ALFA) is performed before each
synthesizer startup. The fully integrated quad-band VCO is designed for the four GSM bands (850, 900, 1800,
1900 MHz) and operates at double or four times transmit or receive frequency. To cover the wide frequency
range the VCO is automatically aligned by a binary automatic band selection (BABS) before each synthesizer
startup.
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LGE Property
3.20 Front End Module control
Implemented in the S-Gold3 (FL500) are two outputs which are VC1, VC2 for direct control of front end modules
with two logic input pins to select RX and TX mode as well as low and high band operation..
Table 8 FEM Control Logic
Figure 27 FEM schematic
L502
DNI
C521
DNI
100ohms
R505
100ohms
R506
C525
47pF
C528
47pF
1.8p
C530
ANT504
18n
C537
C542
100pF
SW501
4
3
2
1
ANT
COMMON
G3
G4
FL500
0
2
9
1
3
1
1
1
8
1
5
1
8
4
1
7
2
1
6
9
5
4
0
1
3
6
1
2
1
17
ANT
1
X
R0
58
M
S
G
2
X
R0
58
M
S
G
1
C
V
1
X
R0
09
M
S
G
2
C
V
2
X
R0
09
M
S
G
1
X
R0
08
1
M
S
G
1
D
N
G
2
X
R0
08
1
M
S
G
2
D
N
G
1
X
R0
09
1
M
S
G
3
D
N
G
2
X
R0
09
1
M
S
G
4
D
N
G
5
D
N
G
XT
00
91
_0
08
1
M
S
G
XT
00
9_
05
8
M
S
G
1
C
N
2
C
N
82pF
C9
4.7pF
C10
VC2
VC1
(FROM Transceiver)
(FROM Transceiver)
VC1 (FE1) VC2 (FE2)
L
GSM 1800 / 1900_ RX
GSM850 / 900_RX
H
L
L
L
L
GSM 1800 / 1900_ TX
LG Electronics
62/147
LGE Property
3.20 Front End Module control
Implemented in the S-Gold3 (FL500) are two outputs which are VC1, VC2 for direct control of front end modules
with two logic input pins to select RX and TX mode as well as low and high band operation..
Table 8 FEM Control Logic
Figure 27 FEM schematic