3-58
Copyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
AUX3[4]
74
I/O
Aux3 data I/O 4.
CAMIN4
I
Camera input 4.
AUX3[3]
75
I/O
Aux3 data I/O 3.
CAMIN3
I
Camera input 3.
CAMIN2
76
I
Camera input 2.
AUX3[2]
I/O
Aux3 data I/O 2.
CAMIN1
80
I
Camera input 1.
AUX3[1]
I/O
Aux3 data I/O 1.
CAMIN0
81
I
Camera input 0.
AUX3[0]
I/O
Aux3 data I/O 0.
MCLK
82
I/O
Audio master clock for audio DAC.
RESET#
83
I
Reset (active-low).
RBCK
84
I/O
Audio receive bit clock.
TDMCLK
I
TDM bit clock.
CLK
I
System clock.
SR[20:27]
85-92
I/O
Application specific pins. Refer to Table 2 for details.
VREF
96
I
Internal voltage reference to video DAC.
COMP
97
I
Compensation input.
YUV3
O
YUV pixel 3 output data.
RSET
98
I
DAC current adjustment resistor input.
YUV4
O
YUV pixel 4 output data.
Names
Pin Numbers
I/O
Definitions