LG CE500, Service Manual

Page: 16 / 127

3. Technical Brief
- 17 -
3.1.6 Memory
• 256 Mbit flash 64Mbit PSRAM
• 16 bit parallel data bus
• ADD0 ~ ADD23.
• 2 Chip enables for Flash memory select.
• RF Calibration data and battery calibration data are also stored in Flash memory area.
3.1.7 Power Management Section
- VCORE : supplies Digital Baseband Processor
core and D6532 digital core (0.8V ~
105V, 300mA)
- VMEM : supplies external memory and the
interface to the external memory on
the digital baseband processor (1,8V
or 2.8V, 150mA)
- VEXT : supplies Radio digital interface and
high voltage interface (2.8V, 200mA)
- VSIM : supplies the SIM interface circuitry
on the digital processor and SIM
card (1.8V or 2.85V, 20mA)
- VRTC : supplies the Real-Time Clock
module (2.8 V, 20 •
µ
A)
- VABB : supplies the analog portions of the
AD6555
- VMIC : supplies the microphone interface
circuitry (2.5 V, 2 mA)
- VVCXO : supplies the voltage controlled
crystal oscillator ( 2.75 V, 10 mA)
- VBACK : supplies the Real-Time Clock module and charges the backup battery (1.8V or 2.8V, 50mA)
- VUSB : supplies the USB interface (3.3V, 15mA)
- VPLL : supplies the phased-lock loops
- VINT : supplies the AD6555 digital core and the interface to the AD6555 on the digital baseband processor
(1.8v, 80mA)
Z3X-BOX.COM