LG 60UH8500, Service Manual

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LGE Internal Use Only Copyright © LG Electronics. Inc. All rights reserved.
Only for training and service purposes
5. Tuner/CI Block Diagram
LN
B
IC690
0
A8
303SESTR-TB
10
[T
ON
EC
TR
L]
2 [LNB
]
7 [SCL
]
8 [SDA
]
SC
L3
SD
A3
DM
D_
AD
C_
IN
P
DM
D_
AD
C_
IN
N
AA
D_
AD
C_
SI
F
33
Ω
TP
O_DA
TA[0-7
]
CI Slot
33
Ω
TP
O_DA
TA[0-7
]
TP
I_DA
TA[0-7
]
/EB_WE_N /EB_OE_N
CA
M_
IREQ_N
CA
M_
REG_
N
CA
M_
WA
IT_N
PCM_RESE
T
EB_D
ATA[0-
7]
CI_D
ATA[0-
7]
EB_A
DDR[0-14]
CI_A
DDR[0-14]
EB_BE_N1 EB_BE_NO /PCM
_CE1
/CI_CD
1
/CI_CD
2
CI 5V
Po
wer
detect
PCM_5V_C
TL
+5V_CI_O
N
CI_TS_SY
NC
CI_TS_VA
L
CI_TS_CL
K
TP
I_SO
P
TP
I_VA
L
TP
I_CL
K
CI
_I
N_
TS
_D
AT
A[
0-7]
TP
I_
DA
TA
[0-7
]
CI
_T
S_DA
TA
[0-7
]
/C
I_
CD
1
/C
I_
CD
2
CA
M_
CD1_N
CA
M_
CD2_N
PCM_CE1_
N
PCM_CE2_
N
PCM_CE
1
PCM_CE
2
10
KΩ
EB_BE_N0 EB_BE_N0
CI
_I
OW
R
CI
_I
OR
D
EB_A
DDR[0-14\
EB_D
AT
A[
0-7]
CI
_A
DDR[0-14
]
CI
_D
AT
A[
0-7]
CA
M_
RESE
T
CA
M_
WA
IT
_N
CA
M_
REG_
N
CA
M_
IR
EQ_N
EB_OE_
N
EB_WE_
N
TP
I_
CL
K
TP
I_
VA
L
TP
I_
SO
P
CI
_T
S_CL
K
CI
_T
S_VA
L
CI
_T
S_SYNC
PCM_RESE
T
/PCM
_W
AI
T
/PCM
_REG
/PCM
_I
RQ
A
/PCM
_O
E
/PCM
_W
E
VC
C
CA
M_
VCC_EN_N
+5V_CI_O
N
TD
JM
-G101
D
[+3.3V
_T
UNER]
11
[IF_
P]
8
[IF_
N]
7
[F
E_DEMOD1_T
S_ERROR]
14
[F
E_DEMOD1_1_T
S_CL
K]
15
[F
E_DEMOD1_T
S_SYNC]
16
[F
E_DEMOD1_T
S_VA
L]
17
FE
_DEM
OD1_
TS
_D
AT
A[
0] 18
FE
_DEM
OD1_
TS
_D
AT
A[
1] 19
FE
_DEM
OD1_
TS
_D
AT
A[
2] 20
FE
_DEM
OD1_
TS
_D
AT
A[
3] 21
FE
_DEM
OD1_
TS
_D
AT
A[
4] 22
FE
_DEM
OD1_
TS
_D
AT
A[
5] 23
FE
_DEM
OD1_
TS
_D
AT
A[
6] 24
FE
_DEM
OD1_
TS
_D
AT
A[
7] 25
[+3.3V
_LNA
_T
U]
3
[LNB_T
X]
12
[LNB_OUT
] 26
+3.3V_TUNE
R
[I2C_SCL5_T
U]
1
[I2C_SDA
5_
TU
]2
[T
U_SI
F_
TU
] 6
[T
U_CVBS_T
U]
4
[IF_
AG
C_
TU
] 5
[/TU
_RESET
1_TU]
10
FIL
TE
R
FE
_DEM
OD1_TS_ERRO
R
FE
_DEM
OD1_TS_CLK
FE
_DEM
OD1_TS_SYN
C
FE
_DEM
OD1_TS_V
AL
FE
_DEM
OD1_TS_D
ATA
[0-7
]
LNB_TX
33
Ω
33
Ω
LNB_OU
T
IF_P IF_N
TUNER_SI
F
TU_C
VB
S
IF_A
GC
ADC_I_IN
P
AD
C_I_IN
N
I2C_SCL5 I2C_SD
A5
33
Ω
/TU_RESET
1
SC
L5
SD
A5
GP
IO
16
CVBS_I
N1
IF
AF
C
CA
M_
CD1_N
TP
I_DA
TA[0-7
]
TP
O_DA
TA
[0-7
]
+3.3V_
TU
2.7K
Ω
+3.3V_LN
A_
TU
1.8K
Ω
M1
6
TP
_DVB_ERR
TP
_DVB_CLK
TP
_DVB_SOP
TP
_DVB_V
AL
TP
_DVB_D
AT
A0
TP
_DVB_D
AT
A1
TP
_DVB_D
AT
A2
TP
_DVB_D
AT
A3
TP
_DVB_D
AT
A4
TP
_DVB_D
AT
A5
TP
_DVB_D
AT
A6
TP
_DVB_D
AT
A7
PCM_
IN
PA
CK
CA
M_
PNPACK
_N
CA
M_
CD2_N
CI
_I
N_
TS
_V
AL
CI
_I
N_
TS
_CLK
CI
_I
N_
TS
_SYN
C
TP
O_CL
K
TP
O_VA
L
TP
O_SO
P
TP
IO
_V
AL
TP
IO
_CLK
TP
IO
_SOP