LG 47LW5700-SA, Service Manual

Page: 21 / 108

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
L/DIM0_VS
I2C_SCL
RESET_LG1121
I2C_SDA
XTAL_OUT
C133
27pF
50V
L/DIM0_MOSI
XTAL_IN
3D_SYNC_Out
SPI_DI
SPI_SCLK
XTAL_OUT
XTAL_IN
SPI_DO
L/DIM0_SCLK
C120
27pF
50V
R154
1M
UART_RX
SPI_CS
UART_TX
SW100
JTP-1127WEM
+3.3VD
R124
33
R140 33
R145 33
R141 33
R144 33
R142 33
R143 33
R146 33
+3.3VD
C1109
0.1uF
SPI_DI
R160
10K
R159
4.7K
SPI_CS
SPI_DO
R161
33
R162
3.3K
SPI_SCLK
INCH_OPT_1
+3.3VD
+3.3VD
OUTPUT_OPT2
+3.3VD
+3.3VD
INCH_OPT_2
OUTPUT_OPT1
R125 10K
R126 33
UART_RX
R166
33
+3.3VD
UART_TX
+3.3V_IO
+1.0AVDD
+3.3V_XTAL
+2.5LVDS_TX
+1.0VDC
+2.5LVDS_RX
+2.5AVDD
C1155
0.1uF
16V
C1119
0.1uF
16V
C1124
0.1uF
16V
C1143
0.1uF
16V
+2.5LVDS_RX
C1159
10uF
25V
+2.5AVDD
C1151
0.1uF
16V
+2.5V
C1153
0.1uF
16V C1134
0.1uF
16V
C1118
0.1uF
16V
C1126
0.1uF
16V
C1141
0.1uF
16V
C1142
0.1uF
16V
C1135
0.1uF
16V
C1133
0.1uF
16V
C1157
0.1uF
16V
+2.5V
C1154
0.1uF
16V
C1120
0.1uF
16V
C1150
10uF
25V
C1152
0.1uF
16V
C1149
10uF
25V
+2.5V
C1158
0.1uF
16V
+2.5AVDD
C1147
0.1uF
16V
+2.5LVDS_TX
C1156
0.1uF
16V C1148
0.1uF
16V
+2.5LVDS_TX
C1125
0.1uF
16V
+2.5LVDS_RX
R123 33
P101
12507WR-04L
1
2
3
4
5
TDO
TDI
TCK
TMS
+3.3VD
TDO
TDI
TMS
TCK
R163 33
R164 33
R165 33 R136 33
R137 33
R138 33
C105
33pF
50V
OPT
C104
33pF
50V
OPT
C102
33pF
50V
OPT
R151
10K
MINI_LVDS
R156
10K
XTR
R153
10K
R158
10K
OUTPUT_OPT2
INCH_OPT_1
R139 33
OPT
R120
33 OPT
OUTPUT_OPT1
INCH_OPT_2
R150
10K
LVDS
R152
10K
OPT
R157
10K
OPT
R155
10K
SHARP
R116 10K
R112
100
1%
R107
100
1%
R114
100
1%
R118
100
1%
R113
100
1%
R110
100
1%
R115
100
1%
R149
100
1%
R117
100
1%
R106
100
1%
R111
100
1%
R148
100
1%
C1136
0.1uF
16V
C1140
0.1uF
16V
R167 10K
R168 10K
R170
10K
OPT
+3.3VD
GPIO_0
R172
10K
OPT
+3.3VD
GPIO_1
GPIO_0
GPIO_1
R169
10K
R171
10K
R173 10K
R175 10K
R174 10K
R147 100K
TRST_N
TRST_N
R176 33
P102
YFW254-07
OPT
1
2
3
4
5
6
7
L104
CIS21J121
L105
CIS21J121
L106
CIS21J121
R177 33
OPT
R179 33
R181 33
R180 33
C1160
33pF
50V
OPT
C1161
33pF
50V
OPT
L/DIM1_VS
L/DIM1_SCLK
L/DIM1_MOSI
C1162
33pF
50V
OPT
R105
1K
R109
1K
TXC2N
TXE0N
TXG1P
TXCCLKP
TXH4N
TXDCLKP
TXD2N
TXH2N
TXG4P
TXF0N
TXB2N
TXB3N
TXCCLKN
TXG1N
TXB1P
TXD2P
TXFCLKN
TXA0P
TXD4P
TXC3P
TXH3P
TXGCLKP
TXA1N
TXC0N
TXH0N
TXF4N
TXBCLKP
TXE4P
TXF2N
TXACLKP
TXA3N
TXDCLKN
TXF1N
TXG2P
TXG4N
TXF0P
TXB4P
TXG3P
TXF3P
TXA0N
TXA2N
TXD4N
TXECLKN
TXH3N
TXC4P
TXH1N
TXC1P
TXD0N
TXD1N
TXG0P
TXBCLKN
TXB2P
TXE4N
TXE3N
TXD0P
TXA3P
TXB1N
TXD3P
TXACLKN
TXA1P
TXHCLKP
TXB4N
TXF3N
TXA4P
TXE2N
TXECLKP
TXE2P
TXGCLKN
TXA2P
TXE0P
TXH0P
TXH4P
TXD1P
TXC4N
TXF1P
TXE1N
TXG0N
TXB3P
TXF2P
TXH2P
TXFCLKP
TXH1P
TXB0N
TXE1P
TXG3N
TXC2P
TXD3N
TXC3N
TXC1N
TXG2N
TXHCLKN
TXC0P
TXE3P
TXB0P
TXF4P
TXA4N
R192 33
AGP_EN
R193
33
LR_IND
R194
33
R195
47K
R196
47K
OPT
RBF
R191 33
R189
10K
+3.3VD
MODE_SEL
R190
10K
TMODE[1]
+3.3VD
R187
3.3K
R185
3.3K
R186
3.3K 3.3K
R188
R183
0
R184
1K
TMODE[1]
I2C_SDA
SPI_SCLK
TRST_N
P100
12507WR-10L
1
2
3
4
5
6
7
8
9
10
11
I2C_SCL
SPI_DO
+3.3VD
SPI_DI
SPI_CS
OUTPUT_OPT4
OUTPUT_OPT3
R1000
10K
DP
+3.3VD
R1001
10K
NON_DP
OUTPUT_OPT4
R1002
10K
OPT
R1003
10K
OUTPUT_OPT3
+3.3VD
TP1
X100
24.75MHz
4
GND_2
1
X-TAL_1
2
GND_1
3
X-TAL_2
C1166
0.22uF
6.3V
C179
0.1uF
16V
C1180
0.22uF
6.3V
C185
0.1uF
16V
C175
0.1uF
16V
+1.0VDC
+1.0VDC
L103
CIS21J121
+1.0V
C147
0.1uF
16V C170
0.1uF
16V
+1.0AVDD
L102
CIS21J121
+1.0VDC
C1113
10uF
25V
+1.0AVDD
+1.0VDC
C154
0.1uF
16V
C187
0.1uF
16V
C160
0.1uF
16V
C1165
0.22uF
6.3V
C167
0.1uF
16V C198
0.1uF
16V C148
10uF
25V
+1.0VDC
C172
0.1uF
16V C1117
10uF
25V
C174
10uF
25V
+3.3V_IO
C1102
0.22uF
6.3V
C111
0.1uF
16V
C1179
0.22uF
6.3V
C108
0.1uF
16V
+3.3V_XTAL
C162
0.1uF
16V C124
0.1uF
16V C1105
0.22uF
6.3V
+3.3V_IO
L101
CIS21J121
C1103
0.22uF
6.3V C127
0.1uF
16V
C125
0.1uF
16V C119
0.1uF
16V C116
0.1uF
16V
C181
10uF
25V
+3.3V_XTAL
C1104
0.22uF
6.3V C169
10uF
25V
+3.3VD +3.3V_IO
+3.3V_IO
C106
0.1uF
16V
L100
CIS21J121
C156
0.1uF
16V
+3.3V_IO
C1101
0.22uF
6.3V
RESET RESET_LG1121
R103
10K
+3.3VD
R182 0
C1106
1uF
6.3V
C1107
1uF
6.3V
C1167
1uF
6.3V
C1168
1uF
6.3V
C1169
1uF
6.3V
C1170
1uF
6.3V
C1171
1uF
6.3V
C1172
1uF
6.3V
C1173
1uF
6.3V
C1174
1uF
6.3V
C1175
1uF
6.3V
C1176
1uF
6.3V
C1177
1uF
6.3V
C1178
1uF
6.3V
R102 33
Q100
KRC103S
W/P
E
B
C
FLASH_WP
R1004
33
W/P
R1005
4.7K
OPT
R1006
4.7K
OPT
+3.3VD
FLASH_WP
R1007 0
R1008 0
R1009 0
W/P
FLASH_WP
IC101
LG1121A
RXA0P
AN2
RXA0N
AN1
RXA1P
AM2
RXA1N
AM1
RXA2P
AL2
RXA2N
AL1
RXACLKP
AK2
RXACLKN
AK1
RXA3P
AJ2
RXA3N
AJ1
RXA4P
AH2
RXA4N
AH1
RXB0P
AG2
RXB0N
AG1
RXB1P
AF2
RXB1N
AF1
RXB2P
AE2
RXB2N
AE1
RXBCLKP
AD2
RXBCLKN
AD1
RXB3P
AC2
RXB3N
AC1
RXB4P
AB2
RXB4N
AB1
DPM
J2
GSP/VST/GST1
H1
H_CONV
D1
POL
E2
SOE
E1
OPT_N
F2
GSC/VGH_ODD
D2
GOE/VGH_EVEN/EO
C1
FLK/GCLK1/GCLK
J1
OPT_P/GCLK2/MCLK
H2
GCLK3/GST2
G1
GCLK4
H3
GCLK5
G2
GCLK6
F1
RMLVDS
D18
TEMPSEL0
L3
TEMPSEL1
K2
TEMPSEL2
K1
L_VSOUT_LD
E31
R_VSOUT_LD
M3
M0_SCLK
E33
M0_MOSI
E34
M1_SCLK
G33
M1_MOSI
G34
M2_SCLK
L2
M2_MOSI
M2
M3_SCLK
L1
M3_MOSI
M1
GPIO[0]
AM10
GPIO[1]/VSYNC_IN
AN10
GPIO[2]
AP10
GPIO[3]/DE_IN
AP9
GPIO[4]
AN9
GPIO[5]
AN8
GPIO[6]
AP8
GPIO[7]
AP7
GPIO[8]/DE_OUT
AN7
GPIO[9]/LED_GPIO[0]
AM7
GPIO[10]/LED_GPIO[1]
AM6
GPIO[11]
AN6
GPIO[12]
AP6
GPIO[13]
AP5
GPIO[14]/SSP0_HS
E32
GPIO[15]/SSP0_MISO
F32
GPIO[16]/SSP0_CS
F33
GPIO[17]/SSP0_INTR
F34
GPIO[18]/SCAN_BLK1
AN5
GPIO[19]/SCAN_BLK2
AN4
GPIO[20]/SCAN_BLK3
AP4
GPIO[21]/SCAN_BLK4
AP3
GPIO[22]/SCAN_BLK5
AN3
GPIO[23]/SSP1_VS
C34
GPIO[24]/SSP1_HS
G32
GPIO[25]/SSP1_MISO
H32
GPIO[26]/SSP1_CS
H33
GPIO[27]/SSP1_INTR
H34
GPIO[28]/SSP2_HS
N1
GPIO[29]/SSP2_MISO
N2
GPIO[30]/LED_VSYNC
D34
GPIO[31]/3D_SYNC_OUT
AP2
UART_RXD
T1
UART_TXD
T2
SPI_SCLK
R1
SPI_CS
R2
SPI_DI
P2
SPI_DO
P1
SDA_M
V1
SCL_M
V2
SDA_S
U1
SCL_S
U2
SMODE
W2
TMODE0
Y1
TMODE1
Y2
TMODE2
AA1
TMODE3
AA2
TRST_N
AP12
TDO
AP11
TDI
AN11
TCK
AP13
TMS
AN13
PORES_N
W1
XTALO
AP15
XTALI
AP14
TXA0P/RRV7P
A2
TXA0N/RRV7N
B2
TXA1P/RRV6P
C3
TXA1N/RRV6N
C2
TXA2P/RRV5P
B3
TXA2N/RRV5N
A3
TXACLKP/RRV4P
A4
TXACLKN/RRV4N
B4
TXA3P/RRVCLKP
C5
TXA3N/RRVCLKN
C4
TXA4P/RRV3P
B5
TXA4N/RRV3N
A5
TXB0P/RRV2P
A6
TXB0N/RRV2N
B6
TXB1P/RRV1P
C7
TXB1N/RRV1N
C6
TXB2P/RRV0P
B7
TXB2N/RRV0N
A7
TXBCLKP
A8
TXBCLKN
B8
TXB3P
C9
TXB3N
C8
TXB4P
B9
TXB4N
A9
TXC0P/RLV7P
A10
TXC0N/RLV7N
B10
TXC1P/RLV6P
C11
TXC1N/RLV6N
C10
TXC2P/RLV5P
B11
TXC2N/RLV5N
A11
TXCCLKP/RLV4P
A12
TXCCLKN/RLV4N
B12
TXC3P/RLVCLKP
C13
TXC3N/RLVCLKN
C12
TXC4P/RLV3P
B13
TXC4N/RLV3N
A13
TXD0P/RLV2P
A14
TXD0N/RLV2N
B14
TXD1P/RLV1P
C15
TXD1N/RLV1N
C14
TXD2P/RLV0P
B15
TXD2N/RLV0N
A15
TXDCLKP
A16
TXDCLKN
B16
TXD3P
C17
TXD3N
C16
TXD4P
B17
TXD4N
A17
TXE0P/LRV7P
A18
TXE0N/LRV7N
B18
TXE1P/LRV6P
C19
TXE1N/LRV6N
C18
TXE2P/LRV5P
B19
TXE2N/LRV5N
A19
TXECLKP/LRV4P
A20
TXECLKN/LRV4N
B20
TXE3P/LRVCLKP
C21
TXE3N/LRVCLKN
C20
TXE4P/LRV3P
B21
TXE4N/LRV3N
A21
TXF0P/LRV2P
A22
TXF0N/LRV2N
B22
TXF1P/LRV1P
C23
TXF1N/LRV1N
C22
TXF2P/LRV0P
B23
TXF2N/LRV0N
A23
TXFCLKP
A24
TXFCLKN
B24
TXF3P
C25
TXF3N
C24
TXF4P
B25
TXF4N
A25
TXG0P/LLV7P
A26
TXG0N/LLV7N
B26
TXG1P/LLV6P
C27
TXG1N/LLV6N
C26
TXG2P/LLV5P
B27
TXG2N/LLV5N
A27
TXGCLKP/LLV4P
A28
TXGCLKN/LLV4N
B28
TXG3P/LLVCLKP
C29
TXG3N/LLVCLKN
C28
TXG4P/LLV3P
B29
TXG4N/LLV3N
A29
TXH0P/LLV2P
A30
TXH0N/LLV2N
B30
TXH1P/LLV1P
C31
TXH1N/LLV1N
C30
TXH2P/LLV0P
B31
TXH2N/LLV0N
A31
TXHCLKP
A32
TXHCLKN
B32
TXH3P
C33
TXH3N
C32
TXH4P
B33
TXH4N
A33
IC101
LG1121A
VDD_1
F5
VDD_2
F6
VDD_3
F7
VDD_4
F9
VDD_5
F11
VDD_6
F13
VDD_7
F15
VDD_8
F17
VDD_9
F20
VDD_10
F22
VDD_11
F24
VDD_12
F26
VDD_13
F28
VDD_14
F30
VDD_15
G5
VDD_16
G30
VDD_17
H5
VDD_18
H30
VDD_19
J5
VDD_20
J30
VDD_21
K5
VDD_22
K30
VDD_23
L5
VDD_24
L30
VDD_25
M5
VDD_26
N5
VDD_27
P5
VDD_28
P30
VDD_29
R5
VDD_30
R30
VDD_31
T5
VDD_32
T30
VDD_33
U5
VDD_34
U30
VDD_35
V5
VDD_36
W5
VDD_37
Y5
VDD_38
Y30
VDD_39
AA5
VDD_40
AA30
VDD_41
AB5
VDD_42
AB30
VDD_43
AC5
VDD_44
AC30
VDD_45
AD5
VDD_46
AD30
VDD_47
AE5
VDD_48
AE30
VDD_49
AF5
VDD_50
AF30
VDD_51
AG5
VDD_52
AG30
VDD_53
AH5
VDD_54
AH30
VDD_55
AJ5
VDD_56
AJ6
VDD_57
AJ7
VDD_58
AJ8
VDD_59
AJ9
VDD_60
AJ10
VDD_61
AJ11
VDD_62
AJ12
VDD_63
AJ17
VDD_64
AJ18
VDD_65
AJ19
VDD_66
AJ20
VDD_67
AJ21
VDD_68
AJ23
VDD_69
AJ24
VDD_70
AJ25
VDD_71
AJ27
VDD_72
AJ28
VDD_73
AJ29
VDD_74
AJ30
VDD33_1
D4
VDD33_2
D5
VDD33_3
D6
VDD33_4
D29
VDD33_5
D30
VDD33_6
D31
VDD33_7
D32
VDD33_8
D33
VDD33_9
E4
VDD33_10
F4
VDD33_11
G4
VDD33_12
H4
VDD33_13
J4
VDD33_14
K4
VDD33_15
L4
VDD33_16
M4
VDD33_17
N4
VDD33_18
P4
VDD33_19
R4
VDD33_20
T4
VDD33_21
U4
VDD33_22
V4
VDD33_23
W4
VDD33_24
Y4
VDD33_25
AA4
VDD33_26
AJ4
VDD33_27
AK4
VDD33_28
AK5
VDD33_29
AK6
VDD33_30
AK7
VDD33_31
AK8
VDD33_32
AK9
VDD33_33
AK10
VDD33_34
AK11
VDD33_35
AK12
AVDD33_XTAL
AK13
LVRX_LVDD_1
AC3
LVRX_LVDD_2
AE3
LVRX_LVDD_3
AJ3
LVRX_LVDD_4
AL3
LVTX_LVCC_1
D8
LVTX_LVCC_2
D10
LVTX_LVCC_3
D12
LVTX_LVCC_4
D14
LVTX_LVCC_5
D16
LVTX_LVCC_6
D19
LVTX_LVCC_7
D21
LVTX_LVCC_8
D23
LVTX_LVCC_9
D25
LVTX_LVCC_10
D27
AVDD10_1
AJ13
AVDD10_2
AJ14
AVDD10_3
AJ15
AVDD10_4
AJ16
AVDD25_1
AM14
AVDD25_2
AM15
AVDD25_3
AM16
IC101
LG1121A
VSS_1
B1
VSS_2
B34
VSS_3
D3
VSS_4
D7
VSS_5
D9
VSS_6
D11
VSS_7
D13
VSS_8
D15
VSS_9
D17
VSS_10
D20
VSS_11
D22
VSS_12
D24
VSS_13
D26
VSS_14
D28
VSS_15
E3
VSS_16
E5
VSS_17
E6
VSS_18
E7
VSS_19
E8
VSS_20
E9
VSS_21
E10
VSS_22
E11
VSS_23
E12
VSS_24
E13
VSS_25
E14
VSS_26
E15
VSS_27
E16
VSS_28
E17
VSS_29
E18
VSS_30
E19
VSS_31
E20
VSS_32
E21
VSS_33
E22
VSS_34
E23
VSS_35
E24
VSS_36
E25
VSS_37
E26
VSS_38
E27
VSS_39
E28
VSS_40
E29
VSS_41
E30
VSS_42
F3
VSS_43
F8
VSS_44
F10
VSS_45
F12
VSS_46
F14
VSS_47
F16
VSS_48
F18
VSS_49
F19
VSS_50
F21
VSS_51
F23
VSS_52
F25
VSS_53
F27
VSS_54
F29
VSS_55
F31
VSS_56
G3
VSS_57
G31
VSS_58
H31
VSS_59
J3
VSS_60
K3
VSS_61
M12
VSS_62
M13
VSS_63
M14
VSS_64
M15
VSS_65
M16
VSS_66
M17
VSS_67
M18
VSS_68
M19
VSS_69
M20
VSS_70
M21
VSS_71
M22
VSS_72
M23
VSS_73
M30
VSS_74
M31
VSS_75
N3
VSS_76
N12
VSS_77
N13
VSS_78
N14
VSS_79
N15
VSS_80
N16
VSS_81
N17
VSS_82
N18
VSS_83
N19
VSS_84
N20
VSS_85
N21
VSS_86
N22
VSS_87
N23
VSS_88
N30
VSS_89
N32
VSS_90
P3
VSS_91
P12
VSS_92
P13
VSS_93
P14
VSS_94
P15
VSS_95
P16
VSS_96
P17
VSS_97
P18
VSS_98
P19
VSS_99
P20
VSS_100
P21
VSS_101
P22
VSS_102
P23
VSS_103
P32
VSS_104
R3
VSS_105
R12
VSS_106
R13
VSS_107
R14
VSS_108
R15
VSS_109
R16
VSS_110
R17
VSS_111
R18
VSS_112
R19
VSS_113
R20
VSS_114
R21
VSS_115
R22
VSS_116
R23
VSS_117
R32
VSS_118
T3
VSS_119
T12
VSS_120
T13
VSS_121
T14
VSS_122
T15
VSS_123
T16
VSS_124
T17
VSS_125
T18
VSS_126
T19
VSS_127
T20
VSS_128
T21
VSS_129
T22
VSS_130
T23
VSS_131
T32
VSS_132
U3
VSS_133
U12
VSS_134
U13
VSS_135
U14
VSS_136
U15
VSS_137
U16
VSS_138
U17
VSS_139
U18
VSS_140
U19
VSS_141
U20
VSS_142
U21
VSS_143
U22
VSS_144
U23
VSS_145
U32
VSS_146
V3
VSS_147
V12
VSS_148
V13
VSS_149
V14
VSS_150
V15
VSS_151
V16
VSS_152
V17
VSS_153
V18
VSS_154
V19
VSS_155
V20
VSS_156
V21
VSS_157
V22
VSS_158
V23
VSS_159
V30
VSS_160
V31
VSS_161
V32
VSS_162
W3
VSS_163
W12
VSS_164
W13
VSS_165
W14
VSS_166
W15
VSS_167
W16
VSS_168
W17
VSS_169
W18
VSS_170
W19
VSS_171
W20
VSS_172
W21
VSS_173
W22
VSS_174
W23
VSS_175
W30
VSS_176
W32
VSS_177
Y3
VSS_178
Y12
VSS_179
Y13
VSS_180
Y14
VSS_181
Y15
VSS_182
Y16
VSS_183
Y17
VSS_184
Y18
VSS_185
Y19
VSS_186
Y20
VSS_187
Y21
VSS_188
Y22
VSS_189
Y23
VSS_190
Y32
VSS_191
AA3
VSS_192
AA12
VSS_193
AA13
VSS_194
AA14
VSS_195
AA15
VSS_196
AA16
VSS_197
AA17
VSS_198
AA18
VSS_199
AA19
VSS_200
AA20
VSS_201
AA21
VSS_202
AA22
VSS_203
AA23
VSS_204
AA32
VSS_205
AB3
VSS_206
AB4
VSS_207
AB12
VSS_208
AB13
VSS_209
AB14
VSS_210
AB15
VSS_211
AB16
VSS_212
AB17
VSS_213
AB18
VSS_214
AB19
VSS_215
AB20
VSS_216
AB21
VSS_217
AB22
VSS_218
AB23
VSS_219
AB32
VSS_220
AC4
VSS_221
AC12
VSS_222
AC13
VSS_223
AC14
VSS_224
AC15
VSS_225
AC16
VSS_226
AC17
VSS_227
AC18
VSS_228
AC19
VSS_229
AC20
VSS_230
AC21
VSS_231
AC22
VSS_232
AC23
VSS_233
AC32
VSS_234
AD3
VSS_235
AD4
VSS_236
AD32
VSS_237
AE4
VSS_238
AF3
VSS_239
AF4
VSS_240
AF32
VSS_241
AG3
VSS_242
AG4
VSS_243
AG32
VSS_244
AH3
VSS_245
AH4
VSS_246
AH32
VSS_247
AJ31
VSS_248
AJ32
VSS_249
AK3
VSS_250
AK14
VSS_251
AK15
VSS_252
AK16
VSS_253
AL4
VSS_254
AL5
VSS_255
AL6
VSS_256
AL7
VSS_257
AL8
VSS_258
AL9
VSS_259
AL10
VSS_260
AL11
VSS_261
AL12
VSS_262
AL13
VSS_263
AL14
VSS_264
AL15
VSS_265
AL16
VSS_266
AL17
VSS_267
AL18
VSS_268
AL19
VSS_269
AL20
VSS_270
AL21
VSS_271
AL22
VSS_272
AL23
VSS_273
AL24
VSS_274
AL25
VSS_275
AL26
VSS_276
AL27
VSS_277
AL28
VSS_278
AL29
VSS_279
AL30
VSS_280
AL31
VSS_281
AL32
VSS_282
AL33
VSS_283
AL34
VSS_284
AM3
VSS_285
AM4
VSS_286
AM5
VSS_287
AM8
VSS_288
AM9
VSS_289
AM11
VSS_290
AM12
VSS_291
AM13
VSS_292
AM23
VSS_293
AM25
VSS_294
AM26
VSS_295
AM30
VSS_296
AM34
VSS_297
AN12
VSS_298
AN14
VSS_299
AN15
VSS_300
AN16
IC102
MX25L4006EM2I-12G
Serial Flash
3
WP#
2
SO/SIO1
4
GND
1
CS#
5
SI/S
6
SCL
7
HOL
8
VCC
TXA1N_2D3D
TXA3N_2D3D
TXACLKN_2D3D
TXB2P_2D3D
TXB1N_2D3D
TXA0N_2D3D
TXACLKP_2D3D
TXB1P_2D3D
TXB2N_2D3D
TXA2N_2D3D
TXA1P_2D3D
TXB4N_2D3D
TXA0P_2D3D
TXBCLKN_2D3D
TXA3P_2D3D
TXB3N_2D3D
TXBCLKP_2D3D
TXB0P_2D3D
TXB3P_2D3D
TXB0N_2D3D
TXA4N_2D3D
TXB4P_2D3D
TXA2P_2D3D
TXA4P_2D3D
LG1121 GP3 2010. 10. 20
1 LG1121 7
XTAL
SPI FLASH(4Mbit)
Output LVDS Data Mapping Selection
- GPIO[3] = 1 : FRC2 LVDS out
- GPIO[3] = 0 : FRC2 MINI_LVDS out Output LVDS Data Mapping Selection
- GPIO[4] = 1 : GP3 SHARP module
- GPIO[4] = 0 : GP3 XTR T-con
UART
+2.5AVDD Decaps
+2.5VLVDS_TX Decaps
+2.5VLVDS_RX Decaps
For JTAG Interface
I2C Slave Address
0x1C (Direct access)
0x70 (In-direct access)
Serial Flash Boot Mode
GPIO[1:0]="00": 50MHz(Default Value)
"01": 20MHz
"10": 33.333MHz
"11": 25MHz
For SPI/I2C Interface
GPIO[18]=External BLU Control sync(120Hz) out
(GPIO[18],[30] connection)
GPIO[22],TP1=BLU sync Reference
(Video sync(240Hz) out monitoring)
GPIO[13:11]=Boot Code Selection
(S/W control for boot code start position)
+1.0AVDD Decaps
+1.0VDC Decaps
+3.3V_IO Decaps
Flash Memory Write Protection
Output LVDS Data Mapping Selection
- GPIO[3] = 1 : Display Port
- GPIO[3] = 0 : Non Display Port