LG 32LX3DC-UA, Service Manual

Page: 20 / 47

BLOCK DIAGRAM DESCRIPTION(MAIN)
- 20 -
ATSC/NTSC tuner (TDVB-001P) can receive both terrestrial analog and terrestrial digital signals.
But a NTSC tuner (6700NFNS06C) can receive terrestrial analog only. Therefore if you run two displays at
thesame time, it is not possible to see two digital channels.
A/V SW (CXA2069) is the IC that takes external input terminal signals and broadcast signals from the tuners and
handles them selectively. Audio signals are sent to MSP4450. Video signals are sent to HD-II via two paths -
VPX3226E on the upper side is used to handle sub displays, while VPX3225E on the lower side controls the main
display.
To the lower side, signals are sent using an expensive 3D-comb filter with Y/C divided.
The video decoder (VPX3226E) is a chip that decodes input signals.
HD-II is a chip that controls nearly all video-related functions, including brightness, sharpness, video formatting and
scaling. If digital broadcasting is available, it comes through TP, which can be controlled from HD-II.
Video SW (CXA2181) is an IC that outputs video signals selectively. The selected one is outputted through ADC
(AD9883A) as a digital signal. uCom (M306H3) interfaces with the main CPU and primarily plays the role of
controlling power supply, remote controller and timers. Thus, while the set is turned off, it sends time information to
uCom for management.
TMDS Tx (Sil169) is the display stage that sends video data to the display medium according to the TMDS
protocol, and the TMSD receiver accepts it and outputs display.
CPU (S3C440BX) is the central processing IC, which controls most of the ICs.
Decryption FPGA(Cyclone EP1C12F256C8) can decrypt the encrypted TP(Digital Tuner stream) to normal TP(non
encrypted stream).