LG 32LW5700, Service Manual

Page: 45 / 108

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
CI_TS_DATA[1]
NAND_DATA[6]
FE_TS_DATA[3]
PCM_MDI[3]
NAND_DATA[5]
CI_DATA[1]
PCM_ADDR[2]
PCM_ADDR[4]
PCM_ADDR[9]
FE_TS_DATA[2]
CI_TS_DATA[5]
CI_DATA[6]
FE_TS_DATA[1]
PCM_TS_DATA[2]
CI_DATA[7]
PCM_ADDR[12]
CI_ADDR[1]
NAND_DATA[2]
CI_MDI[5]
PCM_MDI[5]
PCM_MDI[7]
CI_DATA[2]
PCM_TS_DATA[4]
CI_DATA[0]
CI_MDI[4]
CI_MDI[0]
CI_TS_DATA[7]
CI_MDI[1]
CI_DATA[6]
CI_MDI[5]
NAND_DATA[4]
CI_MDI[0]
FE_TS_DATA[0]
CI_ADDR[14]
CI_ADDR[10]
CI_TS_DATA[2]
PCM_MDI[6]
PCM_MDI[2]
PCM_TS_DATA[5]
CI_DATA[0]
CI_TS_DATA[6]
CI_MDI[3]
CI_MDI[6]
PCM_TS_DATA[3]
NAND_DATA[0]
CI_MDI[6]
CI_ADDR[8]
PCM_TS_DATA[6]
FE_TS_DATA[4]
PCM_MDI[4]
PCM_MDI[0]
PCM_TS_DATA[1]
CI_TS_DATA[0]
CI_ADDR[6]
NAND_DATA[7]
CI_MDI[2]
PCM_ADDR[3]
CI_DATA[7]
CI_DATA[5]
CI_MDI[7]
FE_TS_DATA[6]
CI_MDI[4]
PCM_ADDR[7]
PCM_TS_DATA[7]
CI_ADDR[0]
PCM_ADDR[11]
CI_TS_DATA[4]
PCM_TS_DATA[0]
CI_MDI[1]
FE_TS_DATA[5]
CI_DATA[3]
CI_MDI[7]
CI_DATA[3]
CI_DATA[2]
CI_ADDR[5]
CI_DATA[1]
CI_DATA[4]
CI_TS_DATA[3]
CI_DATA[5]
CI_DATA[4]
CI_MDI[2]
CI_MDI[3]
PCM_MDI[1]
FE_TS_DATA[7]
NAND_DATA[3]
PCM_ADDR[13]
NAND_DATA[1]
CI_TS_SYNC
R1954
22
CI
R1970
22
CI
R1961 22 CI
P1901
10067972-000LF CI
G1 G2
57
TS_OUT_CLK
21 ADDR12
52
VPP
16 /IRQA
10
ADDR11
47
TS_IN0
41
TS_OUT7
5
DAT6
36
/CI_DET1
59
CI_WAIT
23
ADDR6
45
IOWR
54
TS_IN5
18
VPP
49
TS_IN2
43
VS1
13 ADDR13
7 /CARD_EN1
38
TS_OUT4
2
DAT3
25 ADDR4
56
TS_IN7
20 TS_IN_CLK
51
VCC
15
/WR_EN
9
/O_EN
46
TS_IN_SYN
40
TS_OUT6
4
DAT5
35
GND
58
CI_RESET
22
ADDR7
53
TS_IN4
17 VCC
11
ADDR10
48
TS_IN1
42
CARD_EN2
12 ADDR8
6
DAT6
37
TS_OUT3
1
GND
24
ADDR5
55
TS_IN6
19
TS_IN_VAL
50
TS_IN3
44
IORD
14
ADDR14
8 ADDR10
39
TS_OUT5
3
DAT4
26 ADDR3 60
INPACK
27
ADDR2
61
REG
28
ADDR1
62
TS_OUT_VAL
29 ADDR0 63
TS_OUT_SYN
30 DAT0 64
TS_OUT0
31
DAT1
32
DAT2
33
/IO_BIT
34 GND
65
TS_OUT1
66
TS_OUT2
67
/CI_DET2
68
GND
69
R1902
22 CI
R1933
10K
OPT
R1917 22 OPT
L1901
BLM18PG121SN1D
CI
R1909 22 OPT
R1953
22
CI
R1919 22 OPT
CI_TS_DATA[3]
+3.3V_CI
AR1903 22 OPT
R1986 22
CI
NIM_TS_SYNC
/PCM_WE
CI 15
/CI_EN1
CI_ADDR[5]
CI_ADDR[0]
R1960
22
CI
PCM_ADDR[13]
NIM_VAL_ERR
R1929
10K
OPT
/PCM_IRQA
C1909
4.7uF
16V
OPT
C1914
0.1uF
16V
CI
CI_TS_DATA[6]
PCM_TS_CLK
R1922 22 CI
+5V_CI_ON
/CI_CE1
R1957 22 CI
CI_ADDR[11]
/CI_CE1
C1912
0.1uF
16V
CI
R1941
10K
CI
R1927 22 CI
R1967 22 CI
NAND_REb
+3.3V_Normal
R1938 62
CI
+5V_CI_ON
R1971
10K
CI
R1951 22
CI
CI_MDI[0-7]
R1907 22
CI
+3.3V_CI
/CI_CD2
+5V_CI_ON
/CI_CD1
R1940
10K
OPT
NIM_TS_CLK
C1901
0.1uF
16V
OPT
+5V_Normal
PCM_TS_DATA[0-7]
R1946
10K
OPT
+3.3V_CI
PCM_ADDR[9]
NAND_WEb
R1910 22 OPT
R1901 22
CI
C1902
0.1uF
16V
OPT
/PCM_IORD
Q1902
AO3407A
CI
G
D S
/CI_CD2
CI_ADDR[1]
CI_TS_CLK
C1911
0.1uF
16V
OPT
R1969
10K
CI
CI_ADDR[9]
C1915
0.1uF
16V OPT
R1980 100 CI
R1945 10K
OPT
R1966
10K CI
R1985
10K
CI
R1936 0
OPT
R1949
22
CI
R1937 62
CI
R1959
22
CI
PCM_MCLKI
PCM_TS_SYNC
C1904
0.1uF
CI
CI_MIVAL_ERR
CI_ADDR[13]
CI_MISTRT
R1947
22
CI
PCM_ADDR[4]
PCM_MDI[0-7]
PCM_ADDR[9]
+3.3V_CI
R1931 22 CI
CI_ADDR[12]
R1918 22 OPT
R1903 22 CI
PCM_MIVAL_ERR
R1939
10K
CI
PCM_ADDR[12]
PCM_ADDR[12]
IC1903
74LVC245A
CI
3
A1
2
A0
4
A2
1
DIR
6
A4
5
A3
7
A5
8
A6
9
A7
10
GND
11
B7
12
B6
13
B5
14
B4
15
B3
16
B2
17
B1
18
B0
19
OE
20
VCC
CI_TS_DATA[0-7]
NAND_REb
PCM_ADDR[13]
R1956 22
CI
/PCM_OE
CI 9
CI_ADDR[2]
CI_ADDR[0]
PCM_ADDR[3]
+3.3V_CI
IC1904
74LVC1G32GW
CI
3 GND
2 A
4 Y
1 B 5 VCC
+3.3V_CI
CI_MDI[0-7]
CI_TS_VAL
PCM_ADDR[2]
CI_TS_DATA[0]
R1948 22 CI
CI_ADDR[10]
C1908
0.1uF
CI
CI_ADDR[3]
C1906
0.1uF
16V
R1958 22 CI
R1942
4.7K
CI
R1934 10K OPT
/PCM_IOWR
R1965
47
CI
FE_TS_DATA[0-7]
/PCM_OE
/PCM_WAIT
CI_TS_DATA[1]
NAND_REb
NAND_RBb
R1962
22
CI
C1907
0.1uF
CI
AR1904 100 CI
/PCM_IOWR
CI 45
PCM_5V_CTL
CI_MISTRT
CI_TS_VAL
R1963 22 CI
L1902
BLM18PG121SN1D
CI
PCM_TS_VAL
GND
+3.3V_CI
CI_MCLKI
R1952 22 CI
PCM_ADDR[7]
R1935 0 CI
R1904 22 CI
CI_TS_DATA[5]
/CI_EN1
/CI_EN1
Q1901
2SC3052
CI
E
B
C
CI_DATA[0-7]
R1964 22
CI
NAND_DATA[0-7]
NAND_CLE
CI_ADDR[8]
PCM_MISTRT
CI_TS_CLK
R1928
22
CI
R1932
10K
CI
R1972
10K
CI
CI_ADDR[4]
/CI_CD1
R1973
10K
CI
CI_MIVAL_ERR
+5V_CI_ON
CI_ADDR[6]
+5V_CI_ON
/PCM_CE1
PCM_ADDR[7]
PCM_RST
/CI_EN1
R1976 22 CI
R1974 22 CI
NAND_WEb
CI_ADDR[7]
+5V_CI_ON
CI_ADDR[1]
+3.3V_CI
CI_TS_DATA[2]
CI_DATA[0-7]
CI_ADDR[14]
PCM_ADDR[2]
PCM_ADDR[11]
PCM_ADDR[4]
R1920 22 CI
R1926
22 CI
R1905 22
CI
C1905
10uF
10V
CI
R1943
22K
CI
C1903
0.1uF
16V
OPT
R1915 22 OPT
AR1905 100 CI
IC1901
74LVC125APW CI
3
1Y
2
1A
4
2OE
1
1OE
6
2Y
5
2A
7
GND
8
3Y
9
3A
10
3OE
11
4Y
12
4A
13
4OE
14
VCC
/PCM_WE
/PCM_IORD
CI 44
+5V_CI_ON
R1906
22 CI
R1955 22
CI
CI_TS_SYNC
C1910 0.1uF
CI
PCM_ADDR[11]
R1968
10K
CI
/CI_CE2
/PCM_CE1
CI 7
R1944
0
OPT
R1950
22
CI
R1921 22 CI
/CI_CE2
CI_TS_DATA[7]
R1908 22 CI
+5V_CI_ON
CI_DET
CI_TS_DATA[4]
CI_MCLKI
PCM_ADDR[3]
IC1905
74LVC245A
CI
3
A1
2
A0
4
A2
1
DIR
6
A4
5
A3
7
A5
8
A6
9
A7
10
GND
11
B7
12
B6
13
B5
14
B4
15
B3
16
B2
17
B1
18
B0
19
OE
20
VCC
R1916 22 OPT
C1913
0.1uF
16V
CI
R1930
10K
OPT
R1975
10K
CI
IC1902
74AHC08PW
CI
3
1Y
2
1B
4
2A
1
1A
6
2Y
5
2B
7
GND
8
3Y
9
3A
10
3B
11
4Y
12
4A
13
4B
14
VCC
C1916
12pF
50V
OPT
R1987
2.2K
CI
AR1901 100 CI
AR1902 100 CI
R1924 100 CI
R1925 100 CI
R1923 220 CI
R1977
10K
OPT
1ST : EBK60752501, 2ND : EBK61011501
Close to CI Slot
3,3V_CI POWER
Close to Tuner
Q1901
NAND F/M Data
CI DETECT
1ST : 0TRIY80001A 2ND : 0TR387500AA
Close to CI Slot
Close to BCM35230
Close to BCM35230
CI
BCM INT Demod
CI TS OUTPUT
CI CONTROL INTERFACE
OE DIR CI_DATA NAND_DATA
L L OUTPUT INPUT
L H INPUT OUTPUT
H X Z Z
CI TS INPUT
CI POWER ENABLE CONTROL
DUAL COMPONENT
Q1902
19
IC1904
BCM INT Demod
BCM35230
1ST : 0ISTLPH062A, 2ND : EAN40055001
58
2010.11.11