16
LatticeECP2 Standard Evaluation Board
Lattice Semiconductor
User’s Guide
PCI/PCI-X Jumpers
Table 29. PRSNT1
Table 30. PRSNT2
Table 31. PCIXCAP and M66EN Encoding
Table 32. PCI TDI and TDO
Table 33. PCI Interrupt
93
NC
-
-
94
GND
-
-
Note: PD = pull-down resistor, PU = pull-up resistor, NC = no-connect, TP = test point.
Location
Position
Function
Default
J9
1 to 2
Master PCI/PCI-X
2 to 3
Target PCI/PCI-X
Open
Target PCI/PCI-X
X
Not installed. If installing header, first cut trace between 2 and 3. If master, also install R51 and C39.
Location
Position
Function
Default
J23
1 to 2
Master PCI/PCI-X
Open
Target PCI/PCI-X
X
Not installed. If master, also install R62 and C47.
PCIXCAP(J24)
M66EN(J38)
Frequency
Default
PCI
PCI-X
1 to 2
2 to 3
33MHz
66MHz
1 to 2
Open
66MHz
66MHz
Open
2 to 3
33MHz
133MHz
Open
Open
66MHz
133MHz
X
Don’t Care
1 to 2
Master
Master
If master, also install R126 and C111.
Location
Position
Function
Default
J13
1 to 2
Target PCI/PCI-X
X
Open
Master PCI/PCI-X
Not installed. If master then cut the trace between 1 and 2.
Location
Position
Function
Default
J19
2 to 4
INT = INTA
X
1 to 3
INT = INTB
4 to 6
INT = INTC
3 to 5
INT = INTD
Not installed. If installing header, first cut trace between 2 and 4.
Table 28. PCI Connections - Component Side (Continued)
J14
Signal Name
LatticeECP2 Pin
sysIO Bank
Notes
