background image

 

15

 

MachXO Standard Evaluation Board

Lattice Semiconductor

Revisions 001 & 002 User’s Guide 

 

Figure 9. MachXO I/O Connections

A

A

B

B

C

C

D

D

E

E

4

4

3

3

2

2

1

1

VC

C

IO0

VC

C

IO0

VC

C

IO0

VC

C

IO0

VC

C

IO1

VC

C

IO1

VC

C

IO1

VC

C

IO1

VC

C

IO2

VC

C

IO2

VC

C

IO2

VC

C

IO2

VC

C

IO3

VC

C

IO3

VC

C

IO3

VC

C

IO3

VC

C

IO[

3.

.0

]

CL

K

_

IN[4

..0

]

SW

IT

C

H

ES[

7

..

0]

LC

D

1

1

LC

D

2

7

RJ4

5

_

IO

[7

..0

]

PR

OT

O10

H

EAD

ER

4

H

EAD

ER

5

H

EAD

ER

0

H

EAD

ER

1

PR

OT

O1

PR

OT

O0

PR

OT

O3

PR

OT

O2

PR

OT

O5

PR

OT

O4

PR

OT

O[

99.

.0]

H

EAD

ER

[3

3.

.0

]

R

J

45_I

O

6

VC

C

IO0

VC

C

IO1

VC

C

IO2

VC

C

IO3

R

J

45_I

O

4

R

J

45_I

O

5

R

J

45_I

O

2

R

J

45_I

O

3

R

J

45_I

O

1

R

J

45_I

O

0

PR

OT

O11

PR

OT

O16

PR

OT

O17

PR

OT

O12

PR

OT

O15

PR

OT

O13

PR

OT

O14

HE

A

D

E

R

2

8

HE

A

D

E

R

2

4

HE

A

D

E

R

2

0

HE

A

D

E

R

1

8

PR

OT

O50

HE

A

D

E

R

2

2

LED

[7.

.0

]

PR

OT

O88

PR

OT

O87

PR

OT

O85

LC

D

2

6

LC

D

2

4

LC

D

2

5

LC

D

2

2

LC

D

1

8

LC

D

1

6

LC

D

[38.

.0]

HE

A

D

E

R

2

6

HE

A

D

E

R

2

7

H

EAD

ER

17

H

EAD

ER

3

H

EAD

ER

2

PR

OT

O6

PR

OT

O7

HE

A

D

E

R

6

HE

A

D

E

R

1

4

HE

A

D

E

R

1

0

R

J

45_I

O

7

HE

A

D

E

R

2

9

HE

A

D

E

R

1

5

HE

A

D

E

R

1

2

HE

A

D

E

R

1

1

PR

OT

O49

HE

A

D

E

R

1

6

PR

OT

O55

HE

A

D

E

R

3

0

PR

OT

O52

HE

A

D

E

R

7

HE

A

D

E

R

8

PR

OT

O56

PR

OT

O46

PR

OT

O57

PR

OT

O54

HE

A

D

E

R

3

1

HE

A

D

E

R

3

2

HE

A

D

E

R

1

3

PR

OT

O48

HE

A

D

E

R

9

HE

A

D

E

R

3

3

PR

OT

O47

PR

OT

O53

HE

A

D

E

R

2

5

HE

A

D

E

R

2

3

HE

A

D

E

R

1

9

PR

OT

O51

PR

OT

O45

PR

OT

O86

PR

OT

O93

PR

OT

O94

DO

NE

_

n

SW

IT

C

H

ES0

SW

IT

C

H

ES1

SW

IT

C

H

ES2

SW

IT

C

H

ES3

SW

IT

C

H

ES4

SW

IT

C

H

ES7

PR

OT

O92

PR

OT

O89

LC

D

7

LC

D

8

LC

D

9

LC

D

1

0

LC

D

1

2

LC

D

1

3

LC

D

1

4

LC

D

1

5

LC

D

1

7

LC

D

1

9

LC

D

2

0

LC

D

2

1

LC

D

2

3

PR

OT

O73

PR

OT

O72

PR

OT

O74

PR

OT

O71

PR

OT

O64

PR

OT

O65

PR

OT

O70

LC

D

3

8

LC

D

3

7

LC

D

3

6

LC

D

3

5

LC

D

3

4

LC

D

3

3

LC

D

3

2

LC

D

3

1

LC

D

3

0

LC

D

2

9

LC

D

2

8

PR

OT

O61

PR

OT

O60

PR

OT

O59

SW

IT

C

H

ES6

SW

IT

C

H

ES5

PR

OT

O90

PR

OT

O91

PR

OT

O9

PR

OT

O8

CL

K

_

IN2

CK

_

C

T

R

L

3

CK

_

C

T

R

L

4

CL

K

_

IN3

CK

_

C

T

R

L

6

CK

_

C

T

R

L

7

LOC

K

_n

PR

OT

O76

PR

OT

O75

LED

0

LED

1

LED

2

LED

3

LED

4

LED

5

LED

6

LED

7

PR

OT

O77

PR

OT

O78

CK

_

C

T

R

L

2

PR

OT

O79

PR

OT

O80

PR

OT

O81

PR

OT

O82

PR

OT

O84

PR

OT

O83

CK

_

C

T

R

L

5

PR

OT

O33

PR

OT

O34

PR

OT

O36

PR

OT

O35

PR

OT

O38

PR

OT

O44

PR

OT

O40

PR

OT

O42

PR

OT

O37

PR

OT

O28

PR

OT

O31

PR

OT

O29

PR

OT

O23

PR

OT

O21

PR

OT

O22

PR

OT

O24

PR

OT

O27

PR

OT

O26

PR

OT

O25

PR

OT

O39

PR

OT

O41

PR

OT

O43

CL

K

_

IN1

PR

OT

O30

PR

OT

O20

PR

OT

O19

CL

K

_

IN0

PR

OT

O18

CK

_

C

T

R

L

0

CK

_

C

T

R

L

1

HE

A

D

E

R

2

1

PR

OT

O69

PR

OT

O63

PR

OT

O62

PR

OT

O68

PR

OT

O67

PR

OT

O66

LC

D

2

LC

D

3

LC

D

4

LC

D

5

LC

D

6

LC

D

1

CL

K

_

IN4

PR

OT

O58

LC

D

0

PR

OT

O32

CL

K

_

IN[4

..0

]

PR

OT

O[

99.

.0]

VC

OR

E

VAU

X

VC

C

IO[

3.

.0

]

SW

IT

C

H

ES[

7

..

0]

LC

D

[38.

.0]

H

EAD

ER

[3

3.

.0

]

RJ4

5

_

IO

[7

..0

]

PLLI

N

_

N

E

G

PLLI

N

_

POS

GSR

_

n

LED

[7.

.0

]

GOE_PLD

DO

NE

_

n

CK

_

C

T

R

L

[7

..0

]

LOC

K

_n

PB1

TD

I

TM

S

TC

K

TD

O

GN

D

GN

D

VC

OR

E

VAU

X

GN

D

Ti

tl

e

S

ize

Do

cu

m

e

n

t Nu

m

b

e

r

Re

v

Da

te

:

S

h

e

e

t

of

<D

o

c

>

0

M

a

c

h

XO Ev

a

lua

ti

o

n

 Bo

a

rd

C

21

2

Ti

tl

e

S

ize

Do

cu

m

e

n

t Nu

m

b

e

r

Re

v

Da

te

:

S

h

e

e

t

of

<D

o

c

>

0

M

a

c

h

XO Ev

a

lua

ti

o

n

 Bo

a

rd

C

21

2

Ti

tl

e

S

ize

Do

cu

m

e

n

t Nu

m

b

e

r

Re

v

Da

te

:

S

h

e

e

t

of

<D

o

c

>

0

M

a

c

h

XO Ev

a

lua

ti

o

n

 Bo

a

rd

C

21

2

RJ45_IO traces are 50 ohm.

Resistors placed close to U2

Place caps close to VCC pins they serve.

PLLIN traces are 50 ohm.

Resistors placed close to U4

R4

2

100

C

R

0603

No

P

o

p

u

la

te

R4

2

100

C

R

0603

No

P

o

p

u

la

te

C4

3

0.

1uF

C

C

0402

Po

pul

a

te

C4

3

0.

1uF

C

C

0402

Po

pul

a

te

R4

1

100

C

R

0603

No

P

o

p

u

la

te

R4

1

100

C

R

0603

No

P

o

p

u

la

te

XO_640 common VCCIO

VCCJ on VCCIO5

XO_640 common VCCIO

XO_640 common VCCIO

XO_640 common VCCIO

U2

E

M

a

c

h

XO_f

pBGA256

17m

m

X17m

m

Po

pul

a

te

XO_640 common VCCIO

VCCJ on VCCIO5

XO_640 common VCCIO

XO_640 common VCCIO

XO_640 common VCCIO

U2

E

M

a

c

h

XO_f

pBGA256

17m

m

X17m

m

Po

pul

a

te

VC

C

IO0_0

F7

VC

C

IO0_1

F8

VC

C

IO1_0

F9

VC

C

IO1_1

F1

0

VC

C

IO2_0

G11

VC

C

IO2_1

H1

1

VC

C

IO3_0

J1

1

VC

C

IO3_1

K11

VC

C

IO4_0

L9

VC

C

IO4_1

L10

VC

C

IO5_0

L7

VC

C

IO5_1

L8

VC

C

IO6_0

J6

VC

C

IO6_1

K6

VC

C

IO7_0

G6

VC

C

IO7_1

H6

GN

D

_

0

A16

GN

D

_

1

T1

6

GN

D

_

2

F1

1

GN

D

_

3

H1

0

GN

D

_

4

J1

0

GN

D

_

5

G9

GN

D

_

6

H9

GN

D

_

7

J9

GN

D

_

8

K9

GN

D

_

9

G8

GN

D

_

10

H8

GN

D

_

11

J8

GN

D

_

12

K8

GN

D

_

13

H7

GN

D

_

14

J7

GN

D

_

15

L6

GN

D

_

16

A1

GN

D

_

17

T1

VC

C

_

3

K7

VC

C

_

2

G7

VC

C

_

1

K10

VC

C

_

0

G10

VC

C

A

U

X

_0

A8

VC

C

A

U

X

_1

T9

R6

0

100

C

R

0603

No

P

o

p

u

la

te

R6

0

100

C

R

0603

No

P

o

p

u

la

te

R6

3

100

C

R

0603

No

P

o

p

u

la

te

R6

3

100

C

R

0603

No

P

o

p

u

la

te

C4

1

0.

1uF

C

C

0402

Po

pul

a

te

C4

1

0.

1uF

C

C

0402

Po

pul

a

te

4

OI

C

C

V

5

OI

C

C

V

I/Os in Bank 5

for XO1200

I/Os in Bank 4

for XO2280

Pin name sequence

PB(640,1200,2280)

U2

C

M

a

c

h

XO_f

pBGA256

17m

m

X

17m

m

Po

pul

a

te

4

OI

C

C

V

5

OI

C

C

V

I/Os in Bank 5

for XO1200

I/Os in Bank 4

for XO2280

Pin name sequence

PB(640,1200,2280)

U2

C

M

a

c

h

XO_f

pBGA256

17m

m

X

17m

m

Po

pul

a

te

N

C

/PB2B/

PB2B

P3

N

C

/PB2D

/PB2D

N6

N

C

/PB2C

/PB2C

N5

PB2A/

PB3A/

PB3A

T2

PB2B/

PB3B/

PB3B

T3

PB2C

/PB3C

/PB3C

R4

PB3D

/PB4D

/PB4D

T4

PB3A/

PB4A/

PB4A

P5

PB3B/

P

B4B/

PB4B

P6

PB3C

/PB4C

/PB4C

T5

PB4A/

PB5A/

PB5A

R6

PB2D

/PB3D

/PB3D

R5

PB4B/

PB5B/

PB5B

T6

PB4C

/PB5C

/PB6A

T8

PB4D

/PB5D

/PB6B

T7

N

C

/PB6A/

PB7C

M7

N

C

/PB6B/

PB7D

M8

PB4E/

PB6C

/PB8C

R7

PB4F

/PB6D

/PB8D

R8

PB5C/P

B6E/PB9A

P7

PB5D/P

B6F/PB9B

P8

PB5B/

PB7B/

PB10F

/C

L

K2

N9

PB5A/

PB7A/

P

B10E

N8

PB7A/

PB7C

/PB10C

P9

PB7B/

PB7D

/PB10D

P10

PB6B/

PB7F

/PB10B/

C

LK3

M9

PB6A/

PB7E/

P

B10A

M1

0

PB6C

/PB8A/

PB11C

R9

PB6D

/P

B8B/

PB11D

R1

0

PB7C

/PB8C

/PB12A

T1

0

PB7D

/PB8D

/PB12B

T1

1

N

C

/P

B8E/

PB12C

N1

0

N

C

/PB8F

/PB12D

N1

1

PB7E/

PB9A/

P

B13A

R1

1

PB7F

/PB9B/

PB13B

R1

2

PB8A/

PB9C

/PB13C

P11

PB8B/

PB9D

/PB13D

P12

PB8C

/PB9E/

P

B14A

T1

3

PB8D

/PB9F

/PB14B

T1

2

PB9A/

PB10A/

PB14C

R1

3

PB9B/

PB10B/

PB14D

R1

4

PB9C

/P

B10C

/P

B15A

T1

4

PB9D

/P

B10D

/P

B15B

T1

5

N

C

/PB11A/

PB16A

R1

5

N

C

/PB11B/

PB16B

R1

6

SLEEPN

P13

PB9F

/P

B10F

/P

B15D

P14

N

C

/P

B11C

/P

B16C

P15

N

C

/P

B11D

/P

B16D

P16

TD

I

N7

TD

O

M6

TM

S

P4

TC

K

R3

N

C

/PB2A/

PB2A

P2

C3

9

10uF

C

C

0805

Po

pul

a

te

C3

9

10uF

C

C

0805

Po

pul

a

te

R5

7

100

C

R

0603

No

P

o

p

u

la

te

R5

7

100

C

R

0603

No

P

o

p

u

la

te

C4

4

10uF

C

C

0805

Po

pul

a

te

C4

4

10uF

C

C

0805

Po

pul

a

te

C1

6

0.

1uF

C

C

0402

Po

pul

a

te

C1

6

0.

1uF

C

C

0402

Po

pul

a

te

R6

1

100

C

R

0603

No

P

o

p

u

la

te

R6

1

100

C

R

0603

No

P

o

p

u

la

te

C1

7

10uF

C

C

0805

Po

pul

a

te

C1

7

10uF

C

C

0805

Po

pul

a

te

R4

5

100

C

R

0603

No

P

o

p

u

la

te

R4

5

100

C

R

0603

No

P

o

p

u

la

te

C1

4

0.

1uF

C

C

0402

Po

pul

a

te

C1

4

0.

1uF

C

C

0402

Po

pul

a

te

C1

5

10uF

C

C

0805

Po

pul

a

te

C1

5

10uF

C

C

0805

Po

pul

a

te

C2

1

0.

1uF

C

C

0402

Po

pul

a

te

C2

1

0.

1uF

C

C

0402

Po

pul

a

te

C2

0

10uF

C

C

0805

Po

pul

a

te

C2

0

10uF

C

C

0805

Po

pul

a

te

C1

9

0.

1uF

C

C

0402

Po

pul

a

te

C1

9

0.

1uF

C

C

0402

Po

pul

a

te

C4

2

10uF

C

C

0805

Po

pul

a

te

C4

2

10uF

C

C

0805

Po

pul

a

te

C3

8

0.

1uF

C

C

0402

Po

pul

a

te

C3

8

0.

1uF

C

C

0402

Po

pul

a

te

C4

0

0.

1uF

C

C

0402

Po

pul

a

te

C4

0

0.

1uF

C

C

0402

Po

pul

a

te

1

OI

C

C

V

0

OI

C

C

V

I/Os in Bank 0

for XO1200

I/Os in Bank 1

for XO2280

Pin name sequence

PT(640,1200,2280)

U2

A

M

a

c

h

XO_f

pBGA256

17m

m

X

17m

m

Po

pul

a

te

1

OI

C

C

V

0

OI

C

C

V

I/Os in Bank 0

for XO1200

I/Os in Bank 1

for XO2280

Pin name sequence

PT(640,1200,2280)

U2

A

M

a

c

h

XO_f

pBGA256

17m

m

X

17m

m

Po

pul

a

te

N

C

/P

T

2

A/

PT

2C

B2

N

C

/P

T

2

B/

PT

2D

B3

PT

2A/

P

T

3

A/

PT

3A

A2

PT

2B/

P

T

3

B/

PT

3B

A3

NC/P

T

2

C/P

T

3

C

D3

NC/P

T

2

D/P

T

3

D

D4

PT

2F

/P

T

4

B/

PT

4B

C5

PT

2E/

P

T

4

A/

PT

4A

C4

PT

2C

/P

T

3

C

/PT

5A

D6

PT

2D

/P

T

3

D

/PT

5B

D5

PT

3A/

P

T

3

E/

PT

5C

B4

PT

3B/

P

T

3

F

/PT

5D

B5

NC/P

T

4

D/P

T

6

F

E6

NC/P

T

4

C/P

T

6

E

E7

PT

3F

/P

T

5

B/

PT

6D

A4

PT

3E/

P

T

5

A/

PT

6C

A5

PT

3C

/P

T

5

C

/PT

6A

C6

PT

3D

/P

T

5

D

/PT

6B

C7

PT

4A/

P

T

5

E/

PT

7A

B6

PT

4B/

P

T

5

F

/PT

7B

B7

PT

4C

/P

T

6

A/

PT

7C

A6

PT

4D

/P

T

6

B/

PT

7D

A7

PT

4E/

P

T

6

C

/PT

8C

B8

PT

4F

/P

T

6

D

/PT

8D

C8

PT5B/

PT

6F

/PT

9B/C

LK0

D7

PT5A/

PT

6E/

PT9A

D8

PT

9A/

P

T

7

A/

PT

9C

E8

PT

9B/

P

T

7

B/

PT

9D

E9

PT

6B/

P

T

7

D

/PT

10B/

C

L

K1

A9

PT

6A/

P

T

7

C

/PT

10A

A10

PT

6C

/P

T

7

E/

PT

10C

C9

PT

6D

/P

T

7

F

/PT

10D

C1

0

PT

8C

/P

T

8

A/

PT

10E

D9

PT

8D

/P

T

8

B/

PT

10F

D1

0

PT

5C

/P

T

8

C

/PT

11A

B9

PT

5D

/P

T

8

D

/PT

11B

B10

PT

7C

/P

T

8

E/

PT

12A

A11

PT

7D

/P

T

8

F

/PT

12B

A12

PT

7A/

P

T

9

A/

PT

12C

B11

PT

7B/

P

T

9

B/

PT

12D

B12

PT

8A/

P

T

9

C

/PT

13C

C1

1

PT

8B/

P

T

9

D

/PT

13D

C1

2

PT

7F

/P

T

9

F

/PT

14B

A14

PT

7E/

P

T

9

E/

PT

14A

A13

PT

9C

/P

T

1

0A/

PT

14C

D1

1

PT

9D

/P

T

1

0B/

PT

14D

D1

2

NC/P

T

1

0

C

/P

T

1

5

A

E10

NC/P

T

1

0

D

/P

T

1

5

B

E11

PT

9E/

P

T

1

0E/

PT

15C

B13

P

T

9

F

/P

T1

0

F

/P

T1

5

D

C1

3

NC/P

T

1

1

A

/P

T

1

6

A

B14

NC/P

T

1

1

B

/P

T

1

6

B

C1

4

N

C

/P

T

1

1C

/P

T

1

6C

A15

N

C

/P

T

1

1D

/P

T

1

6D

B15

R5

6

100

C

R

0603

No

P

o

p

u

la

te

R5

6

100

C

R

0603

No

P

o

p

u

la

te

R4

4

100

C

R

0603

No

P

o

p

u

la

te

R4

4

100

C

R

0603

No

P

o

p

u

la

te

R6

5

100

C

R

0603

No

P

o

p

u

la

te

R6

5

100

C

R

0603

No

P

o

p

u

la

te

3

OI

C

C

V

2

OI

C

C

V

Pin name sequence

PR(640,1200,2280)

U2

D

M

a

c

h

XO_f

pBGA256

17m

m

X

17m

m

Po

pul

a

te

3

OI

C

C

V

2

OI

C

C

V

Pin name sequence

PR(640,1200,2280)

U2

D

M

a

c

h

XO_f

pBGA256

17m

m

X

17m

m

Po

pul

a

te

N

C

/P

R

2

A/

PR

3A/

L

V_T

D1

4

N

C

/P

R

2

B/

PR

3B/

L

V_C

D1

3

N

C

/P

R

3

A/

PR

4A/

L

V_T

E13

N

C

/P

R

3

B/

PR

4B/

LV_C

E12

NC/P

R3

C/P

R

4

C

F1

3

NC/P

R3

D/P

R

4

D

F1

2

PR

3C

/P

R

4

A/

PR

5A/

L

V_T

E14

PR

3D

/P

R

4

B/

PR

5B/

L

V_C

F1

4

PR

2A/

P

R

4

C

/PR

5C

B16

PR

2B/

P

R

4

D

/PR

5D

C1

6

PR

2C

/P

R

5

A/

PR

6A/

L

V_T

C1

5

PR

2D

/P

R

5

B/

PR

6B/

L

V_C

D1

5

PR

3A/

P

R

5

C

/PR

6C

D1

6

PR

3B/

P

R

5

D

/PR

6D

E16

PR

4A/

P

R

6

A/

PR

7A/

L

V_T

E15

PR

4B/

P

R

6

B/

PR

7B/

L

V_C

F1

5

PR

5A/

P

R

6

C

/PR

7C

F1

6

PR

5B/

P

R

6

D

/PR

7D

G16

PR

4C

/P

R

7

A/

PR

9A/

L

V_T

G12

PR

4D

/P

R

7

B/

PR

9B/

L

V_C

G13

PR

6C

/P

R

7

C

/PR

9C

H1

2

PR

6D

/P

R

7

D

/PR

9D

H1

3

PR

5C

/P

R

8

A/

PR

10A/

LV_T

G14

PR

5D

/P

R

8

B/

PR

10B/

LV_C

H1

4

PR

6A/

P

R

8

C

/PR

10C

G15

PR

6B/

P

R

8

D

/PR

10D

H1

5

PR

7A/

P

R

9

A/

PR

11A/

LV_T

H1

6

PR

7B/

P

R

9

B/

PR

11B/

LV_C

J1

6

NC/P

R9

C/P

R

1

1

C

J1

2

NC/P

R9

D/P

R

1

1

D

K12

PR

7C

/P

R

1

0A/

PR

13A/

LV_T

J1

5

PR

7D

/P

R

1

0B/

PR

13B/

LV_C

K15

PR

8A/

P

R

1

0C

/P

R

1

3C

J1

4

PR

8B/

P

R

1

0D

/P

R

1

3D

K14

PR

8C

/P

R

1

1A/

PR

14A/

LV_T

J1

3

PR

8D

/P

R

1

1B/

PR

14B/

LV_C

K13

PR

9A/

P

R

1

1C

/P

R

1

4C

K16

PR

9B/

P

R

1

1D

/P

R

1

4D

L16

PR

9C

/P

R

1

2A/

PR

15A/

LV_T

L15

PR

9D

/P

R

1

2B/

PR

15B/

LV_C

M1

5

PR

10C

/PR

12C

/PR

15C

M1

6

PR

10D

/PR

12D

/PR

15D

N1

6

PR

10A/

PR

13A/

PR

16A/

LV_T

L14

PR

10B/

PR

13B/

PR

16B/

LV_C

M1

4

PR

11B/

PR

13D

/PR

16D

L13

PR

11A/

PR

13C

/PR

16C

L12

PR

11C

/PR

14A/

PR

17A/

LV_T

N1

5

PR

11D

/PR

14B/

PR

17B/

LV_C

N1

4

NC/P

R1

4

C

/P

R1

7

C

M1

2

NC/P

R1

4

D

/P

R1

7

D

M1

3

NC/P

R1

5

A

/P

R1

8

A

/L

V

_

T

N1

3

NC/P

R1

5

B

/P

R1

8

B

/L

V

_

C

N1

2

NC/P

R1

6

A

/P

R2

0

A

L11

NC/P

R1

6

B

/P

R2

0

B

M1

1

R5

8

100

C

R

0603

No

P

o

p

u

la

te

R5

8

100

C

R

0603

No

P

o

p

u

la

te

C1

8

10uF

C

C

0805

Po

pul

a

te

C1

8

10uF

C

C

0805

Po

pul

a

te

R5

9

100

C

R

0603

No

P

o

p

u

la

te

R5

9

100

C

R

0603

No

P

o

p

u

la

te

R4

3

100

C

R

0603

No

P

o

p

u

la

te

R4

3

100

C

R

0603

No

P

o

p

u

la

te

R6

2

100

C

R

0603

No

P

o

p

u

la

te

R6

2

100

C

R

0603

No

P

o

p

u

la

te

6

OI

C

C

V

7

OI

C

C

V

Pin name sequence

PL(640,1200,2280)

U2

B

M

a

c

h

XO_f

pBGA256

17m

m

X

17m

m

Po

pul

a

te

6

OI

C

C

V

7

OI

C

C

V

Pin name sequence

PL(640,1200,2280)

U2

B

M

a

c

h

XO_f

pBGA256

17m

m

X

17m

m

Po

pul

a

te

N

C

/P

L2A/

PL2A/

P

LL1T

_F

B

E4

N

C

/P

L2B/

PL2B/

P

LL1C

_F

B

E5

N

C

/P

L3A/

PL3A/

L

V_T

F5

N

C

/P

L3B/

PL3B/

L

V_C

F6

PL3A/

P

L3C

/PL3C

/P

LL1T

_I

N

F3

PL3B/

P

L3D

/PL3D

/P

LL1C

_I

N

F4

PL2C

/P

L4A/

PL4A/

LV_T

E3

PL2D

/P

L4B/

PL4B/

LV_C

E2

NC/P

L

4

C/P

L

4

C

C3

NC/P

L

4

D/P

L

4

D

C2

PL2A/

P

L5A/

PL5A/

L

V_T

B1

PL2B/

P

L5B/

PL5B/

L

V_C

C1

PL3C

/P

L5C

/PL6C

D2

PL3D

/P

L5D

/PL6D

D1

PL5A/

P

L6A/

PL7A/

L

V_T

F2

PL5B/

P

L6B/

PL7B/

G

SR

/L

V_C

G2

PL4A/

P

L6C

/PL7C

E1

PL4B/

P

L6D

/PL7D

F1

N

C

/P

L7A/

PL8A/

L

V_T

G4

N

C

/P

L7B/

PL8B/

L

V_C

G5

PL4C

/P

L7C

/PL8C

G3

PL4D

/P

L7D

/PL8D

H3

N

C

/P

L8A/

PL9A/

L

V_T

H4

N

C

/P

L8B/

PL9B/

L

V_C

H5

PL5C

/P

L8C

/PL10C

G1

PL5D

/P

L8D

/PL10D

H1

PL6A/

P

L9A/

PL11A/

LV_T

H2

PL6B/

P

L9B/

PL11B/

LV_C

J2

PL7C

/P

L9C

/PL11C

J3

PL7D

/P

L9D

/PL11D

K3

P

L

6

C

/P

L

1

0

A

/P

L

1

2

A

/L

V

_

T

J1

PL6D

/P

L10B/

P

L12B/

L

V_C

K1

P

L

9

A

/P

L

1

0

C

/P

L

1

2

C

K2

PL9B/

P

L10D

/P

L12D

L2

PL7A/

P

L11A/

P

L13A/

L

V_T

L1

T

S

ALL/

PL8C

/P

L11C

/PL14C

N1

P

L

8

D

/P

L

1

1

D

/P

L

1

4

D

P1

PL10A/

PL12A/

PL15A/

LV_T

L3

PL10B/

PL12B/

PL15B/

LV_C

M3

PL9C

/P

L12C

/P

L15C

M2

PL9D

/P

L12D

/P

L15D

N2

P

L

8

A

/P

L

1

3

A

/P

L

1

6

A

/L

V

_

T

J4

PL8B/

P

L13B/

P

L16B/

L

V_C

J5

PL11A/

PL13C

/PL16C

R1

PL11B/

PL13D

/PL16D

R2

N

C

/P

L14A/

PL17A/

LV_T

/P

LL0_T

_

F

B

K5

N

C

/P

L14B/

PL17B/

LV_C

/P

LL0_C

_

F

B

K4

PL10C

/PL14C

/PL17C

L5

PL10D

/PL14D

/PL17D

L4

N

C

/P

L15A/

PL18A/

LV_T

/P

LL0_T

_

IN

M5

N

C

/P

L15B/

PL18B/

LV_C

/P

LL0_C

_

IN

M4

PL11C

/PL16A/

PL19A

N4

PL11D

/PL16B/

PL19B

N3

PL7B/

P

L11B/

P

L13B/

L

V_C

M1

R6

4

100

C

R

0603

No

P

o

p

u

la

te

R6

4

100

C

R

0603

No

P

o

p

u

la

te

Summary of Contents for MachXO

Page 1: ...March 2008 Revision EB21_01 6 MachXO Standard Evaluation Board Revisions 001 002 User s Guide...

Page 2: ...lock input general purpose I O pins RJ 45 connector not populated LCD GPIO footprint 100mil center center test point grid Impedance controlled Mictor not populated General Description The heart of the...

Page 3: ...ches are not all ON or all OFF the LEDs for the switches that are ON will light up Additionally other I Os on the MachXO device are also toggled using the internal counter outputs See the source code...

Page 4: ...t voltage is converted by DC DC converters and switching power supplies to provide 3 3V 1 2V and an adjustable DC source on the board The output from these supplies travels through surface mounted fus...

Page 5: ...e 2 MachXO Standard Evaluation Board Programmability The programming interface for the MachXO and ispClock5610 is located in the northwest corner of the board The 1x10 header JP7 is the connection poi...

Page 6: ...ate it is necessary to instantiate the GSR macro in the VHDL Verilog HDL source Immediately adjacent to the MachXO reset switch is the ispClock reset switch S3 Pressing this button asserts RESET to th...

Page 7: ...rids The board includes five 100 mil center center prototype grid areas consisting of plated through holes with various connections It is important to note the board conventions used to identify the t...

Page 8: ...points The MachXO I O pin connec tions are indicated in the silkscreen marking For example the top left location connects to MachXO pin F5 etc These test points are directly connected to the MachXO w...

Page 9: ...ve element seven segement LCD display When this display is populated it is mounted on the rows between U3 and JP23 JP24 JP23 and JP24 can then be populated with general purpose headers Jumpers can the...

Page 10: ...osition the switch is tied to ground Table 8 Switch Assignments Oscillator and Clock Inputs The MachXO Standard Evaluation Board provides the ability to supply selectable reference frequencies to the...

Page 11: ...e of the board are two resistor sites R158 and R159 R158 connects XU2 pin 10 to the ispClock5610 positive clock input R159 connects JP4 to the ispClock positive clock input By default R158 has a zero...

Page 12: ...s The profiles are selected using the PS1 0 input pins The ispClock is programmed with a unique personality in profile 0 None of the remaining profiles provide additional frequencies Profile 0 is conf...

Page 13: ...l Lattice trademarks registered trademarks patents and disclaimers are as listed at www latticesemi com legal All other brand or product names are trademarks or registered trademarks of their respecti...

Page 14: ...C 1 12 Title Size Document Number Rev Date Sheet of Doc 0 MachXO Evaluation Board C 1 12 Title Size Document Number Rev Date Sheet of Doc 0 MachXO Evaluation Board C 1 12 Page 2 Page 3 Page 4 Page 5...

Page 15: ...F CC0402 Populate C16 0 1uF CC0402 Populate R61 100 CR0603 NoPopulate R61 100 CR0603 NoPopulate C17 10uF CC0805 Populate C17 10uF CC0805 Populate R45 100 CR0603 NoPopulate R45 100 CR0603 NoPopulate C1...

Page 16: ...pF CC0603 Populate C31 2200pF CC0603 Populate J56 JBLOCK Populate J56 JBLOCK Populate R153 10 CR0603 Populate R153 10 CR0603 Populate R145 0 005 602SJ Populate R145 0 005 602SJ Populate F1 3A 383milX1...

Page 17: ...EVEN D12 14 EVEN D11 16 EVEN D10 18 EVEN D9 20 EVEN D8 22 EVEN D7 24 EVEN D6 26 EVEN D5 28 EVEN D4 30 EVEN D3 32 EVEN D2 34 EVEN D1 36 EVEN D0 38 GND_0 39 GND_1 40 GND_2 41 GND_3 42 GND_4 43 M1 MOUNT...

Page 18: ...25 BANK_3B 26 BANK_3A 27 GNDO_3 28 VCCO_4 29 BANK_4B 30 BANK_4A 31 GNDO_4 32 VCCA 13 GNDA 14 SGATE 40 GOE 42 OEX 21 OEY 22 LOCK 34 TDI 39 TDO 35 TMS 37 TCK 38 TEST1 46 TEST2 45 GNDD_0 23 GNDD_1 48 VCC...

Page 19: ...te COM 1 1G 2 QE 3 1D 4 1C 5 2E 6 2D 7 2C 8 3E 9 3D 10 3C 11 DP3 12 4E 13 4D 14 4C 15 DP4 16 5E 17 5D 18 5C 19 5B 20 5A 21 5F 22 5G 23 4B 24 4A 25 F4 26 4G 27 3B 28 3A 29 3F 30 3G 31 DP2 32 2B 33 2A 3...

Page 20: ...ard C 7 12 Title Size Document Number Rev Date Sheet of Doc 0 MachXO Evaluation Board C 7 12 73 59 45 0 58 46 95 74 Page 8 Page 9 Page 10 Page 11 The series resistors with a short circuit should be pl...

Page 21: ...K CR0603 NoPopulate TP165 TEST POINT TP165 TEST POINT 1 TP137 TEST POINT TP137 TEST POINT 1 TP104 TEST POINT TP104 TEST POINT 1 R170 1K CR0603 NoPopulate R170 1K CR0603 NoPopulate TP78 TEST POINT TP78...

Page 22: ...OINT 1 TP400 TEST POINT TP400 TEST POINT 1 TP392 TEST POINT TP392 TEST POINT 1 TP300 TEST POINT TP300 TEST POINT 1 TP316 TEST POINT TP316 TEST POINT 1 TP375 TEST POINT TP375 TEST POINT 1 TP377 TEST PO...

Page 23: ...opulate TP197 TEST POINT TP197 TEST POINT 1 R202 1K CR0603 NoPopulate R202 1K CR0603 NoPopulate R235 1K CR0603 NoPopulate R235 1K CR0603 NoPopulate TP235 TEST POINT TP235 TEST POINT 1 TP268 TEST POINT...

Page 24: ...n Board C 11 12 Title Size Document Number Rev Date Sheet of Doc 0 MachXO Evaluation Board C 11 12 TP44 TEST POINT TP44 TEST POINT 1 TP21 TEST POINT TP21 TEST POINT 1 TP56 TEST POINT TP56 TEST POINT 1...

Page 25: ...Mouser Electronics Authorized Distributor Click to View Pricing Inventory Delivery Lifecycle Information Lattice LCMXO640C L EV LS X2280 BASE PC N...

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