iCE40 SPRAM Usage Guide
Technical Note
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TN1314-1.0
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Table 2.1. SB_SPRAM256KA RAM Port Definitions
(Continued)
User
Primitive
Port Name
Test
Primitive
Port
Name
Primitive
Port
Width
HW
Port
Name
HW
Port
Width
Pin Name
Default Value
Description
Note
SLEEP
—
[0:0]
DS
[0:0]
Deep
Sleep
Input
1b’0
This pin shuts down
power to periphery and
maintains memory
contents.
The outputs of the
memory are pulled low.
3
POWEROFF
—
[0:0]
—
[0:0]
Power Off
Input
1b’1
This pin turns off the
power to the memory
core. Note that there is
no memory data
retention when this is
driven low.
4
DATAOUT
—
[15:0]
Q
[15:0]
Data
Output
bus
—
This pin outputs the
contents of the memory
location addressed by
the address Input
signals.
—
Notes
:
1.
MASKWREN includes the nibble write masks for the DATAIN.
The hardware port, WEM allows write mask for individual bits of DATAIN.
For external user primitive level, this mask is available for each nibble (4-bits). Thus the MASKWREN has to map to WEM as
follows:
MASKWREN(3) => WEM(15)
MASKWREN(3) => WEM(14)
MASKWREN(3) => WEM(13)
MASKWREN(3) => WEM(12)
MASKWREN(2) => WEM(11)
MASKWREN(2) => WEM(10)
MASKWREN(2) => WEM(9)
MASKWREN(2) => WEM(8)
MASKWREN(1) => WEM(7)
MASKWREN(1) => WEM(6)
MASKWREN(1) => WEM(5)
MASKWREN(1) => WEM(4)
MASKWREN(0) => WEM(3)
MASKWREN(0) => WEM(2)
MASKWREN(0) => WEM(1)
MASKWREN(0) => WEM(0)
2.
The default value of each MASKWREN is 1. In order to mask a nibble of DATAIN, the MASKWREN needs to be pulled low (0).
The following shows which MASKWREN bits enable the mask for the DATAIN nibbles:
MASKWREN(3) enables mask for DATAIN(15:12)
MASKWREN(2) enables mask for DATAIN (11:8)
MASKWREN(1) enables mask for DATAIN (7:4)
MASKWREN(0) enables mask for DATAIN(3:0)
3.
STANDBY, SLEEP signals are mutually exclusive. Refer to the Logic Truth Table (Power Modes) section in the datasheet for valid
values for these signals in different states.
4.
POWEROFF is a signal that controls the built in power switch in each memory block. This signal when driven low (1’b0), shuts
down the power to the memory. During the off state, there is no memory data retention.
When POWEROFF is driven high (1’b1), the SPRAM is powered on.
There are no special attributes needed for SB_SPRAM256KA because it has fixed configuration of 16,384 addresses and
16 data width, running in Normal mode. The inputs (ADDRESS and DATAIN) are always registered. DATAOUT has no
registers.
SB_SPRAM256KA RAM does not support initialization through device configuration.
