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Kontron MOPSlcdLX, User Manual

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Kontron MOPSlcdLX User Manual Download Page 46

KTD-S0005-0 

Page 42 

Appendix B: Connector Layout 

 

 

 

 

 

MOPSlcdLX

 User's Guide 

Appendix B: Connector Layout 

B.1 Connector 

Locations 

 
 

X1

500

5

X

1500

1

X1

5

0

0

2X

1

5

0

0

4X

1

5

0

0

0

X10000

X15003

X12001 X15006 X15007 X14001

X11000

X160

00

JP7000

JP14002

X1

2000

Pin 1

 

 
 

Summary of Contents for MOPSlcdLX

Page 1: ...MOPSlcdLX KTD S0005 0...

Page 2: ...4 3 1 Functional Specifications 4 3 2 Block Diagram 6 3 3 Mechanical Specifications 7 3 4 Electrical Specifications 7 3 5 External Real Time Clock Battery 8 3 6 Environmental Specifications 8 3 7 MTBF...

Page 3: ...Floppy Drive Interface 23 14 1 Connector 23 15 EIDE Interface P ATA 24 15 1 Connector 24 16 LAN Controller 25 16 1 Connector 25 17 Power Supply 26 17 1 Connector 26 17 2 Power Pins 26 17 3 External Ba...

Page 4: ...pendix A System Resources 38 A 1 Interrupt Request IRQ Lines 38 A 2 Direct Memory Access DMA Channels 39 A 3 Memory Area 39 A 4 I O Address Map 40 A 5 PCI Devices 41 A 6 System Management Bus SMBus 41...

Page 5: ...ically for any purpose without the express written permission of KONTRON Technology A S 1 3 Trademarks Brand and product names are trademarks or registered trademarks of their respective owners 1 4 St...

Page 6: ...support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness 1 7 Technical Support Pl...

Page 7: ...simplified when using the onboard standard JILI 40 pins or JILI30 interface As part of the standard features package all MOPS modules come with a JIDA interface which is integrated into the BIOS of t...

Page 8: ...One parallel ATA PCI IDE controller Four USB channels OHCI EHCI only two channels available Onchip Video Graphics Array VGA CRT monitor interface resolution up to 1920x1440 pixel LVDS flatpanel inter...

Page 9: ...2 3 and IEEE 802 3u External ISA bus LPC Fintek F85226F One PC 104 bus connector 8 16 bit I O and memory access All ISA interrupts and 8 bit DMA signals available 16 bit DMA not supported Bus master m...

Page 10: ...ller P ATA_ X15006 X15007 USB 0 1_ Ethernet i82551ER LVDS Transmitter VT1631L LVDS_ X12000 Super I O W83627HG GPI O Serial Ports Floppy RS 232 Interface MAX211E X15004 X15003 X16000 LAN_ LPC Bus LPC E...

Page 11: ...umption tests were executed during the DOS prompt with 256 MB DDR SDRAM CRT monitor USB keyboard and CF card as boot device default BIOS settings Full Load Soft Off S5 A W A W 1 10 5 50 0 20 1 00 Supp...

Page 12: ...ren Finnish VAROITUS Paristo voi r j ht jos se on virheellisesti asennettu Vaihda paristo ainoastaan laltevalmistajan suosittelmaan tyyppiln Havita kaytetty paristo valmistajan ohjeiden mukaisesti Sp...

Page 13: ...C so in that sense the following results are slightly conservative The MTBF values shown below are for a 40 C in an office or telecommunications environment Higher temperatures and other envi ronmenta...

Page 14: ...arious interfaces on standard connectors Connect the CRT monitor to the CRT interface or a LCD panel to the JILI interface by using the corresponding adapter cable Plug a keyboard and or mouse to the...

Page 15: ...GB The total amount of memory available on the SDRAM module is used for main memory and graphic memory on the MOPSlcdLX Shared Memory Architecture SMA manages the sharing of system memory between grap...

Page 16: ...nd D The corresponding 40 pin stackthrough header ISA bus 36 pins has four added ground pins two on each side of the connector To avoid confusion the first two pins are defined as pin C0 and pin D0 Th...

Page 17: ...used on the MOPSlcdLX board Only Universal and 3 3V add on cards are permitted VI O and VCC are open default or set to 3 3V on the PCI bus 5V PCI add on cards can irretrievably damage the MOPSlcdLX b...

Page 18: ...el Connector The LVDS interface for the flat panel is available through the X12000 connector 40 pins on the top side of the board The implementation of this subsystem complies with the JILI specificat...

Page 19: ...Second channel data output 0 negative 18 STX0 Second channel data output 0 positive 19 SCL I2C clock line 20 STX1 Second channel data output 1 negative 21 STX1 Second channel data output 1 positive 22...

Page 20: ...he CRT connector If necessary program the EEPROM on the JILI cable with the matching configuration data If you still do not see improvement consider contacting the dealer for technical support 8 4 Ava...

Page 21: ...56 110h Graphic 640 x 480 32k 111h Graphic 640 x 480 64k 112h Graphic 640 x 480 16M 113h Graphic 800 x 600 32k 114h Graphic 800 x 600 64k 115h Graphic 800 x 600 16M 116h Graphic 1024 x 768 32k 117h Gr...

Page 22: ...SUB9 an adapter cable is required A 9 pin DSUB cable is available from KONTRON KAB DSUB9 2 part number 96017 0000 00 0 The fol lowing table shows the pinouts for COMA and COMB as well as necessary con...

Page 23: ...ction DSUB25 1 STB Strobe 1 2 AFD Autofeed 14 3 D0 Data 0 2 4 ERR Error 15 5 D1 Data 1 3 6 INIT Init 16 7 D2 Data 2 4 8 SLIN Select in 17 9 D3 Data 3 5 10 GND Ground 18 11 D4 Data 4 6 12 GND Ground 19...

Page 24: ...oard data 1 6 KBCLK Keyboard clock 5 7 GND Ground 3 8 VCC 1 Power 5V 4 9 BATT Battery 10 PWRGD Power good Note 1 To protect the external power lines of peripheral devices make sure that the wires have...

Page 25: ...andard PS 2 mouse The cable is available from KONTRON KAB MOUSE PS2 part number 96062 0000 00 0 Header Pin Signal Name Function 6 pin PS 2 1 MSDAT Mouse data 2 2 VCC 1 Power 5V 4 3 GND Ground 3 4 MSCL...

Page 26: ...lable from KONTRON KAB USB 1 part number 96054 0000 00 0 Header Pin Signal Name Function 1 VCC 1 Power 5V 2 USB USB port negative 3 USB USB port positive 4 GND Ground Note 1 To protect the external po...

Page 27: ...PPY MOPS 1 part number 96019 0000 00 0 It also is possible to get a slim line 3 5 floppy drive with cable FLOPPY MOPS 1 part number 96010 0000 00 0 Header Pin Signal Name Function Pin Signal Name Func...

Page 28: ...Data 6 6 D9 Data 9 7 D5 Data 5 8 D10 Data 10 9 D4 Data 4 10 D11 Data 11 11 D3 Data 3 12 D12 Data 12 13 D2 Data 2 14 D13 Data 13 15 D1 Data 1 16 D14 Data 14 17 D0 Data 0 18 D15 Data 15 19 GND Ground 20...

Page 29: ...the system to boot up via a network connection from a PXE server 16 1 Connector The LAN interface is available through the connector X16000 8 pins To have the signals available on a standard RJ45 con...

Page 30: ...8 8 VCC 1 Power supply 5V Note 1 To protect the external power lines of peripheral devices make sure that the wires have the right diameter to withstand the maximum available current to enclosure of...

Page 31: ...ery to pin 3 BATT of the power connector instead of pin 9 of the key board connector For more information refer to the keyboard chapter of this manual Attention Pin 3 power connector and pin 9 keyboar...

Page 32: ...ected then follow these five steps Power down the system Remove the tagged jumper JP14002 see the picture Power up the system and enter the BIOS Setup Before saving your new settings with Save Exit pu...

Page 33: ...combination of CPU and memory clock frequency is possible To ensure functionality of the board please make sure to use only combinations from the following table CPU Speed Memory Speed 200 MHz DDR200...

Page 34: ...es may show disturbances i e vertical lines This is due to non optimum timings in the FINTEK ISA bridge which cannot be fixed 20 2 PCI Bus Limitations The PCI bus implementation has the following thre...

Page 35: ...omposed of several sections Setup Screen Location Function Menu Bar Upper half Lists and selects all top level menus Legend Bar Near bottom or bottom Lists Setup navigation keys Item Specific Help Win...

Page 36: ...e set or disable supervisor password Set User Password Change set or disable user password Save Exit Setup Saves Setup values to CMOS and exit Setup Exit Without Saving Discards all Setup values and e...

Page 37: ...efines the head park position Sector N A Number of sectors per track 21 4 Advanced BIOS Features Feature Option Description Security Option Setup System Setup password required for Setup System passwo...

Page 38: ...use Function Disabled Enabled Disabled prevents installed PS 2 mouse from functioning but frees IRQ12 Enabled forces the PS 2 mouse port to be ena bled regardless if a mouse is present Video BIOS Shad...

Page 39: ...id if LCD Resolution Auto Color Depth 18 Bit 24 Bit Defines the LCD color depth Pixel per Clock Single Double Defines the number of LCD clock lines Color Mode FPDI LDI FPDI Flat Panel Display Interfac...

Page 40: ...ort 2 3E8 IRQ4 2E8 IRQ3 Selects I O base and IRQ of serial port respec tively disables the port Parallel Port Disabled 378 IRQ7 278 IRQ5 3BC IRQ7 Selects I O base and IRQ of serial port respec tively...

Page 41: ...System Voltage 12V N A 12V voltage external power supply 21 9 Board Information Feature Option Description BIOS Version N A Shows the actual BIOS version BIOS Date N A Shows the BIOS production date L...

Page 42: ...No 2 8259 Slave Cascade No 3 Serial Port 2 COM2 No Note 1 4 Serial Port 1 COM1 No Note 1 5 Yes Note 2 6 Floppy Controller No Note 1 7 Parallel Port LPT1 No Note 1 8 Real Time Clock RTC No 9 Yes 10 PCI...

Page 43: ...A channels not available A 3 Memory Area The first 640 kB of DRAM are used as main memory DOS can address 1 MB of memory directly Memory area above 1 MB high memory extended memory is accessed under D...

Page 44: ...ble address of COM4 02F8h 02FFh Serial Port 2 No Note 1 0378h 037Fh Parallel Port 1 No Note 1 03BCh 03C4h Yes Possible address of LPT3 03B0h 03DFh Graphic Controller No 03E8h 03EFh Yes Possible addres...

Page 45: ...ller 2 INTD Chipset Encryption Controller INTA Chipset LAN Controller INTC PCI bus AD19 A 6 System Management Bus SMBus The MOPSlcdLX uses an onboard System Management Bus SMBus This bus is not availa...

Page 46: ...ppendix B Connector Layout MOPSlcdLX User s Guide Appendix B Connector Layout B 1 Connector Locations X15005 X15001 X15002 X15004 X15000 X10000 X15003 X12001 X15006 X15007 X14001 X11000 X16000 JP7000...

Page 47: ...KTD S0005 0 Page 43 Appendix B Connector Layout MOPSlcdLX User s Guide B 2 Mechanical Dimensions 0 5 08 85 09 90 2 0 8 89 82 55 10 1 5 08 90 81 59 3 4x 3 18 2 5 0 0 95 9...

Page 48: ...MOLEX 51021 0400 or comp for PS 2 mouse X15000 X15001 2 54 mm 10 pin AMP 1 215882 0 or comp for DSUB9 adaption COMA COMB X15002 2 54 mm 10 pin AMP 1 215882 0 or comp for keyboard feature connector X15...

Page 49: ...IRQ15 7 SD2 12V 2 LA18 IRQ14 8 SD1 0WS LA17 DACK0 9 SD0 12V 2 MEMR DRQ0 10 IOCHRDY GND 1 MEMW DACK5 11 AEN SMEMW SD8 DRQ5 12 SA19 SMEMR SD9 DACK6 13 SA18 IOW SD10 DRQ6 14 SA17 IOR SD11 DACK7 15 SA16...

Page 50: ...PERR 3 VCC3 2 Reserved 11 STOP VCC3 2 LOCK 3 GND 12 VCC3 2 TRDY GND DEVSEL 13 FRAME GND IRDY VCC3 2 14 GND AD16 VCC3 2 C BE2 15 AD18 VCC3 2 AD17 GND 16 AD21 AD20 GND AD19 17 VCC3 2 AD23 AD22 VCC3 2 18...

Page 51: ...4 FTXC 12 D12 FDIR GND FTXC 13 D2 N C D5 GND 14 D13 STEP GND FTX3 15 D1 GND D6 FTX3 16 D14 WDATA GND SDA 17 D0 GND D7 STX0 18 D15 WGATE GND STX0 19 GND GND ACK SCL 20 KEY N C TRK0 GND STX1 21 DRQ GND...

Page 52: ...C 2 Pin CRT X12001 LAN X16000 USB A X15006 USB B X15007 1 RED TXD VCC 2 VCC 2 2 GRN TXD USB0 USB0 3 BLU RXD USB0 USB0 4 GND GND GND GND 5 VSYNC GND 6 HSYNC RXD 7 GND 8 GND Note 1 Key pin for PC 104 GN...

Page 53: ...m standards hdaudio High Speed Serialized AT Attachment S ATA http www sata io org developers IEEE 802 3 Specification Ethernet http standards ieee org getieee802 Low Pin Count Interface Specification...

Page 54: ...N Design 1 8 01 03 07 M H ttmann Delete restriction of PCI clock signals PC104 connector 1 7 12 07 06 M H ttmann Change chapter Special BIOS Hints 1 6 11 07 06 M H ttmann Added chapter KONTRON BIOS Ex...

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