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5.6.15. Connector X2007 ( Aux Interface )
DDC_SCL, DDC_SDA
These two pins are functionally suitable for a DDC interface between the graphics controller chip and
the CRT monitor. Open collector bidirectional signals with TTL level ( Pulled up ).
3V backup cell input. BATT should be connected to a 3V backup cell for RTC operation and storage
register non-volatility in the absence of system power. (VBATT = 3V to 3.3V DC)
5.6.16. Connector X1401 ( FLEX32 Interface )
All signals are LVTTL compatible.
PR0-PR5
Red color data lines for flatpanel.
PG0-PG5
Green color data lines for flatpanel.
PB0-PB5
Blue color data lines for flatpanel.
PCLK
Data shift clock for flatpanel.
PHS
Horizontal sync pulse for flatpanel.
PVS
Vertical sync pulse for flatpanel.
PDE
Data enable signal for flatpanel.
Panel_VCC
Switched Power supply for flatpanel.
Caution:
Adjust correct voltage setting, default value R1410 =
+5V.
R/L
Rotate image in right or left direction. Adjust correct setting with JP1400.
U/D
Rotate image up or down. Adjust correct setting with JP1401.