CP6012
Introduction
ID 33274, Rev. 5.0
Page 1 - 11
P R E L I M I N A R Y
1.6
Technical Specification
Table 1-2: CP6012 Main Specifications
CP6012
SPECIFICATIONS
P
rocessor and Memory
CPU
The CP6012 supports the following microprocessors:
•
Intel® Core™ Duo, T2500 (SV), 2.0 GHz, 667 MHz FSB, 2 MB L2 cache
•
Intel® Core™ Duo, L2400 (LV), 1.66 GHz, 667 MHz FSB, 2 MB L2 cache
•
Intel® Core™2 Duo, T7400 (SV), 2.16 GHz, 667 MHz FSB, 4 MB L2 cache
•
Intel® Core™2 Duo, L7400 (LV), 1.5 GHz, 667 MHz FSB, 4 MB L2 cache
All microprocessors are provided in a 479 µFCBGA packaging.
Memory
Main Memory:
•
Up to 4 GB dual-channel, registered DDR2 memory with Error Checking
and Correcting (ECC) running at 400 MHz (PC3200)
Cache structure:
•
64 kB L1 on-die full speed processor cache
•
32 kB for instruction cache
•
32 kB for data cache
•
Up to 4 MB L2 on-die full speed processor cache
FLASH Memory:
•
Two 1 MB FLASH for redundant BIOS
Memory Extension:
•
CompactFlash socket type II (true IDE mode)
Serial EEPROM:
•
24LC64 (64 kbit)
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