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Preface
CP6002
Page x
ID 1036-6431, Rev. 2.0
P R E L I M I N A R Y
DIP Switch SW3 for PMC Interface Configuration ..................................... 4 - 4
JP2 Jumper Setting for RS-422 TXD Termination (COM2) ........................ 4 - 5
JP3 Jumper Setting for RS-422 RXD Termination (COM2) ....................... 4 - 5
4-13 Board Interrupt Configuration Register (BICFG) ...................................... 4 - 12
4-16 Board and PLD Revision Register (BREV) .............................................. 4 - 14
4-17 Geographic Addressing Register (GEOAD) ............................................. 4 - 14
4-18 Watchdog Timer Control Register (WTIM) ............................................... 4 - 16
4-20 Debug LED Configuration Register (DLCFG) .......................................... 4 - 18
4-21 Debug LED Control Register (LCTRL) ..................................................... 4 - 19
4-22 IPMI Controller Status Register 0 (ICSTA0) ............................................. 4 - 20
4-23 IPMI Controller Status Register 1 (ICSTA1) ............................................. 4 - 21
Maximum Input Power Voltage Limits ........................................................ 5 - 3
DC Operational Input Voltage Ranges ....................................................... 5 - 3
CP6002 with Win. XP and Processor and Graphics in Idle State .............. 5 - 7
CP6002 with Win. XP and Max. Proc. Workload and Graph. in Idle State.. 5 - 7
CP6002 with Win. XP and Maximum Processor and Graphics Workload .. 5 - 7
Power Consumption of CP6002 Accessories ............................................ 5 - 8
Power Consumption of the Gigabit Ethernet Controller ............................ 5 - 8
CP6001-EXT-SATA Main Specifications ................................................... A - 3