Kontron COMe-cHL6, User Manual

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COMe-cHL6 / Pinout List
B64 P PCI Express lane 1 + receive DP-I - -
B65 PCIE_RX1- PCI Express lane 1 - receive DP-I - -
B66 WAKE0# PCIE_WAKE# I/O-3.3 PU 1k2 3.3V (S5) -
B67 WAKE1# WAKE1# I-3.3 PU 10k 3.3V (S5) -
B68 P PCI Express lane 0 + receive DP-I - -
B69 PCIE_RX0- PCI Express lane 0 - receive DP-I - -
B70 GND Power Ground PWR - -
B71 LVDS_B_DATA0_P / LVDS Channel B Data0+ DP-O - -
B72 LVDS_B0- LVDS_B_DATA0_N / LVDS Channel B Data0- DP-O - -
B73 LVDS_B_DATA1_P / LVDS Channel B Data1+ DP-O - -
B74 LVDS_B1- LVDS_B_DATA1_N / LVDS Channel B Data1- DP-O - -
B75 LVDS_B_DATA2_P/ LVDS Channel B Data2+ DP-O - -
B76 LVDS_B2- LVDS_B_DATA2_N / LVDS Channel B Data2 - DP-O - -
B77 LVDS_B_DATA3_P / LVDS Channel B Data3+ DP-O - -
B78 LVDS_B3- LVDS_B_DATA3_N / LVDS Channel B Data3- DP-O - -
B79 LVDS/eDP_BKLT_EN LVDS_eDP_BKLT_EN / Panel Backlight ON O-3.3 PD 100k -
B80 GND Power Ground PWR - -
B81 LV LVDS_B_CLK_P / LVDS Channel B Clock+ DP-O - -
B82 LVDS_B_CK- LVDS_B_CLK_N / LVDS Channel B Clock- DP-O - -
B83 LVDS/eDP_BKLT_CTRL LVDS_eDP_BKLT_CTRL / Backlight Brightness Contr. O-3.3 - -
B84 VCC_5V_SBY +V_STBY_ETX / 5V Standby PWR 5V (S5) - optional (not neccessary in single supply
mode)
B85 VCC_5V_SBY +V_STBY_ETX / 5V Standby PWR 5V (S5) - optional (not neccessary in single supply
mode)
B86 VCC_5V_SBY +V_STBY_ETX / 5V Standby PWR 5V (S5) - optional (not neccessary in single supply
mode)
B87 VCC_5V_SBY +V_STBY_ETX / 5V Standby PWR 5V (S5) - optional (not neccessary in single supply
mode)
B88 BIOS_DIS1# BIOS_DIS1# I-3.3 PU 10k 3.3V (S5) -
B89 VGA_RED CRT_RED / Analog Video RGB-RED OA PD 150R not available on Haswell ULT
B90 GND Power Ground PWR - -
B91 VGA_GRN CRT_GREEN / Analog Video RGB-GREEN OA PD 150R not available on Haswell ULT
B92 VGA_BLU CRT_BLUE / Analog Video RGB-BLUE OA PD 150R not available on Haswell ULT
B93 VGA_HSYNC CRT_HSYNC / Analog Video H-Sync O-3.3 - not available on Haswell ULT
B94 VGA_VSYNC CRT_VSYNC / Analog Video V-Sync O-3.3 - not available on Haswell ULT
B95 VGA_I2C_CK CRT_DDC_CLK / Display Data Channel Clock I/O-3.3 PU 1k1 3.3V (S0) not available on Haswell ULT
B96 VGA_I2C_DAT CRT_DDC_DATA / Display Data Channel Data I/O-3.3 PU 1k1 3.3V (S0) not available on Haswell ULT
B97 SPI_CS# SPI_CS# / SPI chip select O-3.3 - -
B98 RSVD n. c. nc - -
B99 RSVD n. c. nc - -
B100 GND Power Ground PWR - -
B101 FAN_PWMOUT Fan PWM Output O-3.3 - -
B102 FAN_TACHIN Fan Tach Input I-3.3 PU 10K 3.3V (S0) -
B103 SLEEP# Sleep Button Input I-3.3 PU 10K 3.3V (S5) -
B104 VCC_12V main input voltage (8.5-20V) PWR 8.5-20V - -
B105 VCC_12V main input voltage (8.5-20V) PWR 8.5-20V - -
B106 VCC_12V main input voltage (8.5-20V) PWR 8.5-20V - -
B107 VCC_12V main input voltage (8.5-20V) PWR 8.5-20V - -
B108 VCC_12V main input voltage (8.5-20V) PWR 8.5-20V - -
B109 VCC_12V main input voltage (8.5-20V) PWR 8.5-20V - -
B110 GND Power Ground PWR - -