PPC-6101
All-in-One CPU Board Series User’s Manual
Jumpers and Connectors
19
CN4: Flat Panel Connector for XVGA
Pin Description Pin Description Pin Description
1
GND
2
GND
3
P24
4
P25
5
P26
6
P27
7
P28
8
P29
9
GND
10
GND
11
P30
12
P31
13
P32
14
P33
15
P34
16
P35
17
VDDM
18
VDDM
19
+12VM
20
+12VM
3.4.3.1 Flat Panel Connector Pin Description
Name Description
P0~P35
Flat panel data output
ENABKL
Activity Indicator and Enable Backlight outputs
SHFCLK
Shift clock. Pixel clock for flat panel data
M
M signal for panel AC drive control
LP
Latch pulse. Flat panel equivalent of HSYNC
FLM
First line marker. Flat panel equivalent of VSYNC
+12VM
+12V power controlled by chipset
ENAVEE / ENAVDD
Power sequencing controls for panel LCD bias volt
VDDM
5V power controlled by chipset and selected by JP2
