Overview
1
Keysight E6960A User Guide and Method of Implementation
31
Transmitter Distortion Enhance Clock Recovery Algorithm
Keysight employs an enhanced clock recovery algorithm when the TX_TCLK is not
available. The algorithm conditions the signal to the nominal bitrate. This is
enabled by default when the
Use 10MHz Ref Clock
checkbox is disabled.
When the
Use 10MHz Ref Clock
checkbox is enabled, the E6960-66600
Frequency Divider board as well as access to TX_TCLK to is required for
synchronization.
NOTE
This test can only be run using a differential output from the transmitter (MDI).
Refer to
on page 14 for connection details. A differential
probe cannot be used for this test.
