TK-3107G
12
3-2. VCO
The operating frequency is generated by Q4 in transmit
mode and Q3 in receive mode. The oscillator frequency is
controlled by applying the VCO control voltage, obtained
from the phase comparator, to the varactor diodes (D2 and
D4 in transmit mode and D1 and D3 in receive mode). The
T/R pin is set high in receive mode causing Q5 and Q7 to
turn Q4 off, and turn Q3 on . The T/R pin is set low in trans-
mit mode. The outputs from Q3 and Q4 are amplifi ed by Q6
and sent to the buffer amplifi ers.
3-2. 压控振荡器
在发射模式中通过 Q4 产生操作频率,在接收模式中通过
Q3 产生操作频率。通过相位比较器到变容二极管 ( 在发射模
式中为 D2 和 D4,在接收模式中为 D1 和 D3) 采用压控振荡器
控制电压来控制振荡频率。在接收模式中,由于 Q5 和 Q7 切
断 Q4 并且导通 Q3,所以发射 / 接收管脚设置为高电平。在发
射模式中,发射 / 接收管脚设置为低电平。Q3 和 Q4 的输出通
过 Q6 被放大并被发送到缓冲放大器。
3-3. Unlock detector
If a pulse signal appears at the LD pin of IC1, an unlock
condition occurs, and the DC voltage obtained from D7, R6,
and C1 causes the voltage applied to the UL pin of the mi-
croprocessor to go low. When the microprocessor detects
this condition, the transmitter is disabled, ignoring the push-
to-talk switch input signal. (See Fig. 5)
4. Transmitter
4-1. Transmit audio
The modulation signal from the microphone is amplifi ed
by IC500 (1/2), passes through a preemphasis circuit, and
amplifi ed by the other IC500 (1/2) to perform IDC operation.
The signal then passes through a low-pass filter (splatter
fi Iter) (Q501 and Q502) and cuts 3kHz and higher frequen-
cies. The resulting signal goes to the VCO through the VCO
modulation terminal for direct FM modulation. (See Fig. 6)
4-2. QT/DQT encoder
A necessary signal for QT/DQT encoding is generated by
IC403 and FM-modulated to the PLL reference signal. Since
the reference OSC does not modulate the loop characteris-
tic frequency or higher, modulation is performed at the VCO
side by adjusting the balance. (See Fig. 6)
3-3. 失锁检测器
如果 IC1 的 LD 管脚上出现高电平,则产生失锁状态,并从
D7,R6 获得直流电压,且 C1 产生的提供给微处理器 UL 管脚的
电压降低。当微处理器检测到此情况时,不能进行发射,无
视通话转换开关输入信号。( 参见图 5)
4. 发射部
4-1. 发射音频
来自于话筒的调制信号通过 I C500(1/2) 被放大,经过一个
预加重电路,并通过另一个 IC500(1/2) 放大后进行 IDC 处理。
然后信号通过一个低通滤波器 ( 分离滤波器 ) ( Q501 和 Q502)
并滤除比 3k H z 频率更高的部分。得到的信号进入压控振荡器
直接进行调频调制。( 参见图 6)
4-2. QT/DQT 编码器
QT/DQT 编码所需的信号通过 IC403 产生,被锁相环电路的
基准频率调整。由于基准振荡器不能对频率环路特性外的频
率进行调制,
因此通过分配器在压控振荡器一侧进行调制。( 参
见图 6)
Fig. 4 PLL circuit /
图 4 锁相环电路
Fig. 5 Unlock detector circuit /
图 4 失锁检测器电路
CIRCUIT DESCRIPTION /
电路说明
PLL
data
12.8MHz
REF OSC
1/N
1/M
IC1: PLL IC
Phase
comparator
Charge
pump
LPF
5kHz/6.25kHz
5kHz/6.25kHz
D2,4
Q4
TX VCO
Q6
BUFF AMP
Q2
RF AMP
Q5,7
T/R SW
D1,3
Q3
RX VCO
IC1
PLL IC
LD
D7
C1
R6
5C
IC403
MCU
UL