KDC-CMP21V
5
Pin No.
Pin Name
I/O
Description / Processing Operation
46
/MUTE R
O
Rch audio muting signal output terminal (L : Muting ON)
47~71
NC
-
NC
72
VSS
-
VSS
73~75
NC
-
NC
76
ELVADJ
I
Mechanism deck position adjustment mode select terminal (L : Adjustment mode)
77~80
NC
-
NC
81
VDD
-
VDD (BU 5V)
82
NC
-
NC
83
REQH
Communication request from Head unit
84
SP/LO+
O
Spindle/Loading motor control terminal
85
SP/LO-
O
Spindle/Loading motor control terminal
86
ELV+
O
Elevator motor control terminal
87
ELV-
O
Elevator motor control terminal
88,89
NC
-
NC
90,91
TEST1,TEST2
I
Test mode terminal
92
8V/7V
O
Mechanism driver IC control terminal
93
EEPWR
I
EEPROM writing mode control terminal (H : Writing, L : NORMAL)
94
TEST/VPP
I
Flash ROM program mode control terminal
95
DATA
I/O
Serial data communication to mechanism control IC
96
/CLK
I/O
Serial clock communication to mechanism control IC
97
SDA
I/O
EEPROM data I/O terminal
98
SCL
O
EEPROM clock output terminal
99
NC
-
NC
100
ARMSW
I
ARM SW detector (H : Arm SW ON)
●
MECHANISM CONTROL IC : 91CW12AFG-5DN4 (X32 : IC4)
Pin No.
Pin Name
I/O
Description / Processing Operation
1
VREFL
I
Reference V input terminal (for ADC)
2
AVSS
-
GND (for ADC)
3
AVCC
-
BU3.3V (for ADC)
4
NC
O
NC (open)
5
20RST
O
Reset control terminal (for decoder, L : RESET, H : NORMAL)
6
20ACK
I
Acknowledge signal input terminal (for decoder)
7
20STBY
O
Stand-by control terminal (for decoder, H : STAND BY, L : NORMAL)
8,9
NC
O
NC (open)
10
20INT
I
Interrupt signal input terminal (for decoder)
11
FOGUP
I
Focus gain interrupt input terminal (H : Fo gain UP, L : NORMAL)
12
LZM
I
0bit MUTE detect (Lch) (L : MUTE OFF, H : MUTE ON)
13
RZM
I
0bit MUTE detect (Rch) (L : MUTE OFF, H : MUTE ON)
14,15
NC
O
NC
16
20CS
O
Chip select signal output terminal (for decoder)
17
20LP
O
Latch pules signal output terminal (for decoder)
MICROCOMPUTER’S TERMINAL DESCRIPTION
